參數(shù)資料
型號: CLC5506
廠商: National Semiconductor Corporation
英文描述: Gain Trim Amplifier (GTA)
中文描述: 修剪增益放大器(多倫多)
文件頁數(shù): 8/12頁
文件大小: 250K
代理商: CLC5506
APPLICATION NOTE
Description
Figure 1 above shows the CLC5506 functional block dia-
gram overview.
The LNA(Low NoiseAmplifier) is responsible for maintaining
a nominal input impedance of 200
with minimum noise
contribution and some finite and fixed amount of gain (
4).
Exceptional Noise Figure (NF) performance of 4.8dB (
@
Gain = 25.75dB) is achieved by utilizing an active impedance
matching circuit technique which overcomes the inevitable
3dB NF penalty when using passive shunt matching.
The LNA stage is immediately followed by a transconduc-
tance stage (Gm) which then converts the LNA’s voltage out-
put into a differential current output with fixed gain.
The 6-bit D/A converter, which processes the digital code
read into the device using the MICROWIRE interface, con-
sists of a 6-bit R2R ladder. In order to achieve true
Linear in
dB
gain control at the output, the D/A converter output is
processed by a
Linear to Exponential
converter block be-
fore being used to set the gain of the input signal. The
Lin-
ear to Exponential
block and the
Temperature Compensa-
tion
blocks work in conjunction to achieve gain stability over
the temperature range. Finally, the output stage consists of a
variable gain cell with open Collector output. This variable
gain cell sets the signal channel gain in accordance with the
value of the digital code.
Gain Control
The CLC5506 minimum gain is at 10dB nominal. There are
a total of 64 distinct gain control codes possible (serial data
input through Data In pin) at 0.25dB/code resulting in a maxi-
mum nominal gain of 25.75dB.
Therefore, the overall gain can be written as:
Gain (dB) = 10dB + N
code
* 0.25 (dB/code)
where N
refers to the decimal equivalent of the 6-bit gain
control code.
TABLE 1.
Gain
0
1
2
***
K
***
62
63
Typical Gain Setting (dB)
10
10.25
10.5
***
10 + 0.25
*
K
***
25.50
25.75
Note
Minimum Gain Setting
Maximum Gain Setting
Power Down
The CLC5506 is able to go to a Power Down mode in order
to minimize its power consumption to a fraction of its nominal
value. The Power Down mode is activated through the MI-
CROWIRE interface by clocking in a
1
into the Power
Down shift register prior to allowing LE (pin 5) to go high. Re-
fer to Figure 2 and Figure 3 for more information.
In Power Down mode, the CLC5506 sinks less than 35μA.
The CLC5506 will wake up to the requested gain level speci-
fied by Data In through the MICROWIRE interface.
When V
is first applied, the device is configured such that
it would always
wake up
with a nominal gain of 17.75dB
(N
code
= 3).
DS101050-17
FIGURE 1. CLC5506 Functional Block Diagram
www.national.com
8
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相關代理商/技術參數(shù)
參數(shù)描述
CLC5506A WAF 制造商:Texas Instruments 功能描述:
CLC5506IM 功能描述:IC AMP GAIN TRIM (GTA)14-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源,單路/雙路(±):4.5 V ~ 16.5 V,±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC(0.154",3.90mm 寬) 供應商設備封裝:14-SOIC 包裝:帶卷 (TR)
CLC5506IMX 功能描述:IC AMP GAIN TRIM (GTA)14-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源,單路/雙路(±):4.5 V ~ 16.5 V,±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC(0.154",3.90mm 寬) 供應商設備封裝:14-SOIC 包裝:帶卷 (TR)
CLC5506M WAF 制造商:Texas Instruments 功能描述:
CLC5506PCASM 功能描述:BOARD EVALUATION FOR CLC5506 RoHS:否 類別:編程器,開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標準包裝:1 系列:- 傳感器類型:CMOS 成像,彩色(RGB) 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP