參數(shù)資料
型號： CLC522AJP
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號調(diào)理
英文描述： Circular Connector; No. of Contacts:79; Series:MS27473; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:20; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:20-35 RoHS Compliant: No
中文描述： SPECIALTY ANALOG CIRCUIT, PDIP14
封裝： PLASTIC, DIP-14
文件頁數(shù)： 3/8頁
文件大?。?/td> 281K
代理商： CLC522AJP
CLC522TypicalPerformance
(T
A
=+25
°
C, V
cc
=
±
5V, A
v
=+10, V
g
=1.1V, R
L
=100
; unless noted)
0
-45
-90
-135
-180
-270
V
out
= 500mV
pp
R
g
=182
R
f
= 1k
A
V
=A
Vmax
(V
g
=1.0V)
A
V
=1
(V
g
=-0.8V)
Gain
Phase
1
Frequency (MHz)
200
N
P
°
/
Frequency Response (A
Vmax
=10)
V
in
= 25mV
pp
R
g
=10.2
R
f
= 715
A
V
=A
Vmax
(V
g
=1.0V)
Gain
Phase
1
Frequency (MHz)
100
N
P
°
/
Frequency Response (A
Vmax
=100)
0
-45
-90
-135
-180
-270
A
V
=1
(V
g
=-0.98V)
V
out
= 2V
pp
R
g
=2k
R
f
= 2.2k
A
V
=A
Vmax
(V
g
=1.0V)
Gain
Phase
1
Frequency (MHz)
500
N
P
°
/
Frequency Response (A
Vmax
=2)
0
-45
-90
-135
-180
-270
A
V
=1
(V
g
=0V)
100
90
80
70
60
50
40
30
20
10
0
Frequency (Hz)
P
PSRR and CMRR (Input Referred)
CMRR
PSRR
10
4
10
5
10
6
10
7
10
8
Phase
Gain
A
vmax
+ 10
V
o
= 2V
pp
R
= 1k
V
g
= 1.1V
M
D
°
/
Gain Flatness & Linear Phase Deviation
0
Frequency (3MHz/div)
30MHz
V
g
(Volts)
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
10
0
F
G
SGNL vs. V
g
, Gain
0.9
0.7
0.5
0.3
0.1 -0.1 -0.3 -0.5 -0.7 -0.9
Frequency (25MHz/div)
0
-45
-90
-135
-180
-225
M
Large Signal Frequency Response
Magnitude
Phase
Gain
SGNL
V
o
= 5V
pp
V
g
= 1.1V
A
vmax
= +100
R
f
= 806
A
vmax
= +2
R
f
= 2k
A
vmax
= +10
R
f
= 1k
0
250
P
R
f
= 1k
V
out
= 0.5V
pp
V
out
= 5V
pp
A
vmax
= +10
V
g
=1.0V
L
S
Large & Small Signal Pulse Response
Time (5ns/div)
3
2
1
0
-1
-2
-3
+.75
+.50
+.25
0
-.25
-.50
-.75
V
out
V
g
V
g
= 1.0V
V
g
= -1.0V
A
vmax
= + 10
V
in
= 0.25V DC
2.5
V
Gain Control Settling Time & Delay
Time (5ns/div)
0
1
Gain Control Channel Feedthrough
Time (5ns/div)
+1V
0
-1V
V
g
Input
Output
V
in
= 0
A
Vmax
= + 10
2V output step
V
g
= 1.0V
.2
.15
0.1
.05
0
-.05
-.1
-.15
-.2
S
Short Term Settling Time
0
100
Time (10ns/div)
A
Vmax
= + 10
2V output step
V
g
= 1.0V
.20
.15
.10
.05
0
-.05
-.10
-.15
-.20
S
Long Term Settling Time
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
Time (sec)
Rs
Ts
A
vmax
= +10
Load Capacitance, C
L
(pF)
S
R
Settling Time vs. Capacitive Load
10
100
1000
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
R
s
C
L
Vg=1.0Volt
5
1
1k
1k
CLC522
Frequency (MHz)
V
g
=
V
g
=
55
40
25
10
-5
-20
-35
-50
-65
-80
-95
G
Feed-through Isolation
1 10 100
A
Vmax
=+2
R
f
=2k
A
Vmax
=+10
R
f
=1k
A
Vmax
=+100
R
f
=750
V
o
=2.5V
pp
50
45
40
35
30
25
20
15
10
5
0
0
2
Attenuation FromMaximumGain (dB)
4
6
8
10
12
14
S
Settling Time vs. Gain
R
f
= 2k
V
o
= 1V
pp
A
vmax
=5
A
vmax
= 10
A
vmax
= 20
3
http://www.national.com
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