參數資料
型號: CLC451
廠商: National Semiconductor Corporation
英文描述: Single Supply, Low-Power, High Output, Programmable Buffer
中文描述: 單電源,低功耗,高輸出,可編程緩沖區(qū)
文件頁數: 8/12頁
文件大?。?/td> 252K
代理商: CLC451
http://www.national.com
8
Figure 1: DC Coupled, A
v
= -1V/V Configuration
Figure 2: DC Coupled, A
v
= +1V/V Configuration
Figure 3: DC Coupled, A
v
= +2V/V Configuration
AC Coupled Single Supply Operation
Figures 4, 5, and 6 show possible non-inverting and invert-
ing configurations for input signals that go below 0.8V DC.
Figure 4: AC Coupled, A
v
= -1V/V Configuration
The input is AC coupled to prevent the need for
level shifting the input signal at the source. The resistive
voltage divider biases the non-inverting input to V
CC
÷ 2
= 2.5V (For V
CC
= +5V).
Figure 5: AC Coupled, A
v
= +1V/V Configuration
Figure 6: AC Coupled, A
v
= +2V/V Configuration
Dual Supply Operation
The CLC451 operates on dual supplies as well as single
supplies. The non-inverting and inverting configurations
are shown in Figures 7, 8 and 9.
Figure 7: Dual Supply, A
v
= -1V/V Configuration
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
R
V
CC
V
CC
1
CLC451
7
6
8
5
3
4
2
1k
1k
C
C
V
Low frequency cutoff
V
2.5
1
2 R C
R
source
whereR
R
2
R
o
in
C
in
=
+
=
=
>>
,
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
b
R
t
V
cm
V
CC
R
L
V
cm
Note:
R
b
provides DC bias for the non-inverting input.
R
, R
and R
are tied to V
for minimum power
consumption and maximum output swing.
V
cm
1
CLC451
7
6
8
5
3
4
2
1k
1k
Select R
t
to yield desired R
in
= R
t
||R
g
, where R
g
= 1k
.
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
t
V
cm
V
CC
R
L
V
cm
Note:
R
and R
are tied to V
for minimum power
consumption and maximum output swing.
1
CLC451
7
6
8
5
3
4
2
1k
1k
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
t
V
cm
V
CC
R
L
V
cm
Note:
R
, R
and R
are tied to V
for minimum power
consumption and maximum output swing.
1
CLC451
7
6
8
5
3
4
2
1k
1k
V
cm
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
R
V
CC
V
CC
1
CLC451
7
6
8
5
3
4
2
1k
1k
C
C
V
Low frequency cutoff
where Rg = 1k
.
V
2.5
1
2 R C
o
in
C
=
+
=
,
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
R
V
CC
V
CC
1
CLC451
7
6
8
5
3
4
2
1k
1k
C
C
C
V
Low frequency cutoff
2V
2.5
1
2 R C
R
source
whereR
R
2
R
o
in
C
in
=
+
=
=
>>
,
0.1
μ
F
6.8
μ
F
+
V
o
V
in
R
t
V
CC
Note:
R
provides DC bias for the
non-inverting input. Select R
t
to
yield desired R
in
= R
t
||1k
.
1
CLC451
7
6
8
5
3
4
2
1k
1k
R
b
0.1
μ
F
6.8
μ
F
+
V
EE
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