
Low Noise Composite Amp With Input Matching
The composite circuit shown in Figure 9 eliminates the
need for a matching resistor to ground at the input. By
connecting two amplifiers in series, the first non-invert-
ing and the second inverting, an overall inverting gain is
realized.
The feedback resistor (R
f
) connected from the
output of the second amplifier to the non-inverting input
of the first amplifier closes the loop, and generates a set
input resistance (R
in
) that can be matched to R
s
. This
resistor generates less noise than a matching resistor to
ground at the input.
Figure 9: Composite Amplifier
Input resistance and DC voltage gain of the amplifier are:
Match the source resistance by setting:
Noise voltage produced by R
f
, referred to the source V
s
, is:
The noise of a simple input matching resistor connected
to ground can be calculated by setting G to 0 in this
equation. Thus, this circuit reduces the thermal noise
produced by the matching resistor by a factor of (1+G).
Rectifier Circuit
Wide bandwidth rectifier circuits have many applications.
Figure 10 shows a 200MHz wideband full-wave rectifier
circuit using a CLC449 and CLC522 amplifier. Schottky or
PIN diodes are used for D1 and D2. They produce an
active half-wave rectifier whose signals are taken at the
feedback diode connection. The CLC522 takes the
difference of the two half-wave rectified signal, producing
a full-wave rectifier.The CLC522 is used at a gain of 5 to
achieve high differential bandwidth. For best high
frequency performance, maintain low parasitic capaci-
tance from the diodes D1 and D2 to ground, and from the
input of the CLC522, to ground.
Figure 10: Full-Wave Rectifier
Flash A/D Application
The Typical Application circuit on the front page shows
the CLC449 driving a flash A/D. Flash A/D’s require fast
settling, low distortion, low noise and wide bandwidth to
achieve high Effective Number of Bits and Spurious Free
Dynamic Range (SFDR).
This circuit connects a CLC449 to a TDA8716, 8-bit,
120MHz Flash Converter. The input capacitance for
this converter is typically 13pF plus layout capacitance.
From the
R
s
and Settling Time vs. C
L
plot in the
Typical Performance Characteristics
section, select
a series resistor (R
s
) of 55
. Place R
s
in series with
the output of the CLC449 to achieve settling to 0.1% in
approximately 11ns.
Keep the amplifier noise seen at the A/D input at least
3dB lower than the A/D’s noise, to avoid degrading A/D
noise performance.
Ordering Information
CLC449 APPLICATIONS
+
CLC449
-
R
f
V
o
R
g2
-
+
20
CLC449
R
f2
R
f1
R
g1
R
in
V
s
R
s
+
R
R
1 G,whereG
1
R
R
R
R
V
V
G
R
R
R
in
f1
g1
f2
g2
o
s
in
+
in
s
=
=
+
=
R
R
in
s
=
e
4 TR
k
R
(
R
1 G
R
2
s
s
in
f
=
)
+
CLC449
-
V
o
+
CLC522
-
500
250
250
3
250
D
1
D
2
R
g
162
R
1
50
R
2
50
3
4
5
6
2
R
f
800
R
o
50
20
12
9
10
V
g
R
in
50
V
in
2
6
Model
CLC449AJP
CLC449AJE
CLC449AMC
Contact factory for other packages and DESC SMD number.
Reliability Information
Temperature Range
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
Description
8-pin PDIP
8-pin SOIC
dice, MIL-STD-883
http://www.national.com
8
Transistor count
26