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參數(shù)資料
| 型號(hào)： | CLC436 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 200MHz, 【15V, Low-Power Voltage Feedback Op Amp |
| 中文描述： | 200MHz的，【15V的，低功耗，電壓反饋運(yùn)算放大器 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 119K |
| 代理商： | CLC436 |
CLC436 Typical Performance Characteristics
(V
cc
= ±15V, A
v
= +2, R
f
=499
W,
R
L
= 1k
W
; unless specified)
CLC436 OPERATION
Description
The CLC436 is a unity gain stable voltage feedback
amplifier. The voltage feedback topology allows for
capacitors and nonlinear devices in the feedback path.
The matched input bias currents track well over
temperature. This allows the DC offset to be minimized
by matching the impedance seen by both inputs.
The low cost, low power, conventional topology, and
high output current make the CLC436 an excellent
choice for applications such as:
Low Power Cable Drivers
Active Filters
Buffers
NTSC and PAL Video Systems
Gain
The non-inverting and inverting gain equations for the
CLC436 are as follows:
Non-inverting Gain:
Inverting Gain:
Where R
f
is the feedback resistor and R
g
is the gain
setting resistor. Figure 1 shows the general non-
inverting gain configuration including the recommended
bypass capacitors.
Figure 1: Recommended Non-Inverting Gain Circuit
Output Drive Performance
The CLC436 can source over 120mA of output current.
It can easily drive 9V
pp
into a 50
load. The circuit
shown in Figure 1 demonstrates the output current
capability of the CLC436. The circuit values listed
below, a 3V
pp
input signal and ±15V supplies, were
used to obtain the result shown in Figure 2.
R
f
= 499
R
g
= 249.5
g
5
R
L
= 50
R
in
= 50
Figure 2: Large Signal Pulse Response into 50
W
The high output drive capability of the CLC436 is
suitable for driving capacitive loads. When driving a
capacitive load or coaxial cable, include a series
resistance R
s
to improve stability. Refer to the
R
s
vs
Capacitive Load
plot in the typical performance
section to determine the recommended resistance for
various capacitive loads.
Single Supply Operation
The CLC436 can be operated from a single supply
using the topology shown in Figure 3. R
1
and R
2
form
a voltage divider that sets the non-inverting input
DC voltage. The coupling capacitor C1 isolates the
DC bias point from the previous stage. The DC gain
of this circuit is 1 and the high frequency gain is set by
R
f
and R
g
.
Power Derating Curves
P
Ambient Temperature (
°
C)
20
60
100
0
40
80
120
0
0.2
0.4
0.6
0.8
1.0
140
160
180
AJP
AJE
I
BI
, I
OS
, V
IO
vs. Temperature
O
I
Temperature (
°
C)
0
-40
20
80
V
IO
I
B
,
O
μ
A
0
0.5
0.2
1.0
0.4
1.5
0.6
2.0
0.8
2.5
1.0
3.0
1.2
-20
0
40
60
I
BI
I
OS
I
BI
& I
OS
vs. Common Mode Input Voltage
I
O
Common Mode Input Voltage
80
-10
-5
0
5
10
I
B
μ
A
0
100
0.5
120
1.0
140
1.5
160
2.0
180
2.5
I
BI
I
OS
+
CLC436
-
R
f
0.1
μ
F
6.8
μ
F
V
o
V
in
+V
cc
0.1
μ
F
6.8
μ
F
-V
cc
R
L
R
g
R
in
p
V
o
Time (100ns/div)
-5
C
-100
-4
-80
-3
-60
-2
-40
-1
-20
0
0
1
20
2
40
3
60
4
80
100
V
in
= 3V
pp
V
out
= 9V
pp
1
R
R
f
g
+
R
R
f
g
http://www.national.com
4
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| CLC440 WAF | 制造商:Texas Instruments 功能描述: |
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