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參數(shù)資料
| 型號： | CLC430 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | General Purpose 100MHz Op Amp with Disable |
| 中文描述： | 通用100MHz的運算放大器具有禁用 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 1118K |
| 代理商： | CLC430 |
General Design Considerations
The CLC430 is a general purpose current-feedback ampli-
fier for use in a variety of small- and large-signal applica-
tions. Use the feedback resistor to fine tune the gain
flatness and -3dB bandwidth for any gain setting. Com-
linear provides information for the performance at a gain of
+2 for small and large signal bandwidths. The plots show
feedback resistor values for selected gains.
Gain
Use the following equations to set the CLC430's non-
inverting or inverting gain:
Non-Inverting Gain = 1+R
R
f
g
Inverting Gain = -R
R
f
g
Choose the resistor values for non-inverting or inverting
gain by the following steps.
V
in
V
out
R
f
R
g
R
s
R
in
CLC430
-
+
Fig. 0 Component Identification
Select the recommended feedback resistor R
f
(refer
to plot in the plot section entitled R
f
vs Gain).
Choose the value of R
g
to set gain.
Select R
s
to set the circuit output impedance.
Select R
in
for input impedance and input bias.
1)
2)
3)
4)
High Gains
Current feedback closed-loop bandwidth is independent of
gain-bandwidth-product for small gain changes. For larger
gain changes the optimum feedback register R
f
is derived
by the following:
R
f
=
724
As gain s ncreased, the feedback resistor allows bandwidth
to be held constant over a wide gain range. For a more
complete explanation refer to application note OA-25 Stabil-
ity Analysis of Current-Feedback Amplifiers.
Resistors have varying parasitics that affect circuit perfor-
mance in high-speed design. For best results, use leaded
metal-film resistors or surface mount resistors. A SPICE
model for the CLC430 is available to simulate overall
circuit performance.
Enable / Disable Function
The CLC430 amplifier features an enable/disable function
that changes the output and inverting input from low to high
impedance. The pin 8 enable/disable logic levels are as
follows:
V
cc
±15V
±5V
Enable
>12.7V
>2.7V
Disable
<10.0V
<0.8V
The amplifier is enabled with pin 8 left open due to the 2k
pull-up resistor, shown in Fig. 1.
To CLC430
Bias network
2k
+
V
cc
Pin 8 DISABLE
8k
-
V
cc
Fig. 1 Pin 8 Equivalent Disable Circuit
Open-collector or CMOS interfaces are recommended to
drive pin 8. The turn-on and off time depends on the speed
of the digital interface.
The equivalent output impedance when disabled is shown
in Fig. 2. With R
g
connected to ground, the sum of R
f
and
R
g
dominates and reduces the disabled output imped-
ance. To raise the output impedance in the disabled state,
connect the CLC430 as a unity-gain voltage follower by
removing R
g
. Current-feedback op-amps need the recom-
mended R
f
in a unity-gain follower circuit. For high density
circuit layouts consider using the dual CLC431 (with
disable) or the dual CLC432 (without disable).
Equivin Disable
R
f
V
out
R
g
V
in
300k
8pF
+
-
Fig. 2 Equivalent Disabled Output Impedance
2
nd
and 3
rd
Harmonic Distortion
To meet low distortion requirements, recognize the effect
of the feedback resistor. Increasing the feedback resistor
will decrease the loop gain and increase distortion. De-
creasing the load impedance increases 3
rd
harmonic
distortion more than 2
nd
.
Differential Gain and Differential Phase
The CLC430 has low DG and DP errors for video applica-
tions. Add an external pulldown resistor to the CLC430’s
output to improve DG and DP as seen in Fig.3. A 604
R
P
will improve DG and DP to 0.01% and 0.02°.
5
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CLC430A8B | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:General Purpose 100MHz Op Amp with Disable |
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| CLC430AID | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Feedback Operational Amplifier |
| CLC430AJE | 制造商:Texas Instruments 功能描述: |
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