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參數(shù)資料
| 型號(hào)： | CLC427 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Dual Voltage Feedback Amplifier for Single Supply Operation |
| 中文描述： | 雙電壓反饋放大器的單電源供電 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 130K |
| 代理商： | CLC427 |
5
http://www.national.com
Load Termination
Since the CLC427 design has been optimized for Single
Supply Operation, it is more capable of sourcing rather
than sinking current. For optimum performance, the load
should be tied to V
EE
. When the load is tied to V
EE
, the
output always sources current.
Output Overdrive Recovery
When the output range of an amplifier is exceeded, time
is required for the amplifier to recover from this over
driven condition. Figure 5 illustrates the overload
recovery of the CLC427 when the output is overdriven.
An input was applied in an attempt to drive the
output to twice the supply rails, V
CC
- V
EE
= 10V, but
the output limits. An inverting gain topology was used,
see Figure 2. As indicated, the CLC427 recovers within
25ns on the rising edge and within 10ns on the falling
edge.
Figure 5: Overdrive Recovery
Channel Matching
Channel matching and crosstalk rejection are largely
dependent on board layout. The layout of Comlinear’s
dual amplifier evaluation boards are designed to produce
optimum channel matching and isolation. Channel
matching for the CLC427 is shown in Figure 6.
Figure 6: Channel Matching
The CLC427’s channel-to-channel isolation is better than
-70dB for video frequencies of 4MHz. Input referred
crosstalk vs frequency is illustrated in Figure 7. Pulsed
crosstalk is shown in Figure 8.
Figure 7: Input Referred Crosstalk vs. Frequency
Figure 8: Pulsed crosstalk
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC427 will
improve stability. The
Frequency Response vs.
Capacitive Load
plot, in the typical performance
section, gives the recommended series resistance value
for optimum flatness at various capacitive loads.
Power Dissipation
The power dissipation of an amplifier can be described in
two conditions:
Quiescent Power Dissipation -
P
Q
(No Load Condition)
Total Power Dissipation -
P
T
(with Load Condition)
The following steps can be taken to determine the power
consumption for each CLC427 amplifier:
1. Determine the quiescent power
P
Q
= I
CC
(V
CC
– V
EE
)
2. Determine the RMS power at the output stage
P
O
= (V
CC
– V
load
) (I
load
)
3. Determine the total RMS power
P
T
= P
Q
+ P
O
Add the total RMS powers for both channels to determine
the power dissipated by the dual.
I
Time (50ns/div)
O
Input
Output
M
Frequency (MHz)
Channel A
Channel B
V
out
= 0.25V
pp
1
10
C
Frequency (MHz)
1
10
100
-100
-90
-80
-70
-60
-50
-40
O
Time (50ns/div)
O
Channel A
Channel B
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC427AJ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Voltage Feedback Amplifier for Single Supply Operation |
| CLC427AJE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-HIGH SPEED OP AMP |
| CLC427AJP | 制造商:Texas Instruments 功能描述: |
| CLC428 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Wideband, Low-Noise, Voltage Feedback Op Amp |
| CLC428 DIE | 制造商:Texas Instruments 功能描述: |
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