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參數(shù)資料
| 型號： | CLC411AJE |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | High-Speed Video Op Amp with Disable |
| 中文描述： | 1 CHANNEL, VIDEO AMPLIFIER, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 640K |
| 代理商： | CLC411AJE |
Figure 5C: ECL Interface
Figure 5B: Differential ECL Interface
Figure 5A: Disable Interface
Q3
+15V
-15V
3.57k
Q1
Q4
Q2
Disable
CLC411 pin 8, DISABLE
V
th
330
-5.2V
ECL
Gate
-5.2V
330
Q1
Q2
Q1,Q2 MPSH10
Q3,Q4 MPSH81
0.1
μ
F
0.1
μ
F
0.1
μ
F
-15V
-5.2V
10k
330
931
Q1
ECL
Gate
Q2
0.1
μ
F
1N914
332
TTL
Gate
50
50
50
Q1
Q2
non-zero R
f
must be used with current-feedback
operational amplifiers such as the CLC411. Application
note OA-13, “Current-Feedback Loop-Gain Analysis
and Performance Enhancements,” explains the
ramifications of R
f
and how to use it to tailor the desired
frequency response with respect to gain. The equations
found in the application note should be considered as a
starting point for the selection of R
f
. The equations do
not factor in the effects of parasitic capacitance found
on the inverting input, the output nor across the feedback
resistor. Equations in OA-13 require values for R
f
(301
), Av (+2) and R
i
(inverting input resistance, 50
).
Combining these values yields a Z
t
* (optimum feedback
transimpedance) of 400
. Figure 4 entitled
"Recommended R
f
vs. Gain" will enable the selection of
the feedback resistor that provides a maximally flat
frequency response for the CLC411 over its gain range.
The linear portion of the two curves (i.e. A
V
>4) results
from the limitation on R
g
(i.e. R
g
≥
50
).
Enable/Disable Operation
The disable feature allows the outputs of several CLC411
devices to be connected onto a common analog bus
forming a high-speed analog multiplexer. When disabled,
the output and inverting inputs of the CLC411 become
high impedances. The disable pin has an internal pull-
up resistor which is pulled-up to an internal voltage, not
to the external supply. The CLC411 is enabled when pin
8 is left open or pulled-up to
≥
+
7V and disabled when
grounded or pulled below
+
3V. CMOS logic devices are
necessary to drive the disable pin. For example, CMOS
logic with V
DD
≥
+
7V will guarantee proper operation over
temperature. TTL voltage levels are inadequate for
controlling the disable feature.
For faster enable/disable operation than 15V CMOS
logic devices will allow, the circuit of Figure 5 is
recommended. A fast four-transistor comparator, Figure
5A, interfaces between the CLC411 DISABLE pin and
several standard logic families. This circuit has a
differential input between the bases of Q1 and Q2. As
such it may be driven directly from differential ECL
logic, as in shown in Figure 5B. Single-ended logic
families may also be used by establishing an appropriate
threshold voltage on the V
th
input, the base of Q2.
Figures 5C and 5D illustrate a single-ended ECL and
TTL interface respectively. The Disable input, the base
of Q1, is driven above and below the threshold, V
th
.
Fastest switching speeds result when the differential
voltage between the bases of Q1 and Q2 is kept to less
A
B
C
1
2
3
4
5
6
7
+
A
CLC411
CLC411
DIS (pin 8)
Buffers
DIS (pin 8)
+
-
B
-
A
Figure 6: General Multiplexing Circuit
5
http://www.national.com
Figure 5D: TTL Interface
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC411AMC | High-Speed Video Op Amp with Disable |
| CLC412AJP | Dual Wideband Video Op Amp |
| CLC412 | Dual Wideband Video Op Amp |
| CLC412A8B | Dual Wideband Video Op Amp |
| CLC412AJE | Dual Wideband Video Op Amp |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC411AJP | 制造商:National Semiconductor Corporation 功能描述:VIDEO AMPLIFIER WITH DISABLE |
| CLC411AJ-QML | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Feedback Operational Amplifier |
| CLC411ALC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Current-Feedback Operational Amplifier |
| CLC411AMC | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High-Speed Video Op Amp with Disable |
| CLC412 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Wideband Video Op Amp |
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