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參數(shù)資料
| 型號(hào)： | CLC020BCQ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SMPTE 259M Digital Video Serializer with Integrated Cable Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 12/15頁(yè) |
| 文件大?。?/td> | 353K |
| 代理商： | CLC020BCQ |
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Application Information
(Continued)
is ground). Configure the SD020EVK to operate in the NTSC
colour bars, BIST mode. Configure the VM700T to make the
jitter measurement in the jitter FFT mode at the frame rate
with 1kHz filter bandwidth and Hanning window. Configure
the setup as shown in
Figure 9
. Switch the test equipment on
(from standby mode) and allow all equipment temperatures
stabilize per manufacturer’s recommendation. Measure the
jitter value after allowing the instrument’s reading to stabilize
(about 1 minute). Consult the VM700T Video Measurement
Set Option 1S Serial Digital Measurements User Manual
(document number 071-0074-00) for details of equipment
operation.
The VM700T measurement system’s jitter floor specification
at 270Mbps is given as 200ps
±
20% (100ps
±
5% typical) of
actual components from 50Hz to 1MHz and 200ps +60%,
-30% of actual components from 1MHz to 10MHz. To obtain
the actual residual jitter of the CLC020, a root-sum-square
adjustment of the jitter reading must be made to compensate
for the measurement system’s jitter floor specification. For
example, if the jitter reading is 250ps, the CLC020 residual
jitter is the square root of (250
2
200
2
) = 150ps. The
accuracy limits of the reading as given above apply.
10091710
FIGURE 9. Jitter Test Circuit
10091713
FIGURE 10. ECL-to-TTL/CMOS level converter/amplifer
C
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| CLC020 | SMPTE 259M Digital Video Serializer with Integrated Cable Driver(SMPTE 259M數(shù)字視頻串行器帶集成電纜驅(qū)動(dòng)器) |
| CLC020ACQ | SMPTE 259M Digital Video Serializer with Integrated Cable Driver |
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