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參數(shù)資料
| 型號： | CLC020ACQ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SMPTE 259M Digital Video Serializer with Integrated Cable Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 316K |
| 代理商： | CLC020ACQ |
Application Information
(Continued)
PCB LAYOUT AND POWER SYSTEM BYPASS
RECOMMENDATIONS
Circuit board layout and stack-up for the CLC020 should be
designed to provide noise-free power to the device. Good
layout practice also will separate high frequency or high level
inputs and outputs to minimize unwanted stray noise pickup,
feedback and interference. Power system performance may
be greatly improved by using thin dielectrics (4 to 10 mils) for
power/ground sandwiches. This increases the intrinsic ca-
pacitance of the PCB power system which improves power
supply filtering, especially at high frequencies, and makes
the value and placement of external bypass capacitors less
critical. External bypass capacitors should include both RF
ceramic and tantalum electrolytic types. RF capacitors may
use values in the range 0.01 μF to 0.1 μF. Tantalum capaci-
tors may be in the range 2.2 μF to 10 μF. Voltage rating for
tantalum capacitors should be at least 5x the power supply
voltage being used. It is recommended practice to use two
vias at each power pin of the CLC020 as well as all RF by-
pass capacitor terminals. Dual vias reduce the interconnect
inductance by up to half, thereby reducing interconnect in-
ductance and extending the effective frequency range of the
bypass components.
The outer layers of the PCB may be flooded with additional
V
(ground) plane. These planes will improve shielding and
isolation as well as increase the intrinsic capacitance of the
power supply plane system. Naturally, to be effective, these
planes must be tied to the V
power supply plane at fre-
quent intervals with vias. Frequent via placement also im-
proves signal integrity on signal transmission lines by provid-
ing short paths for image currents which reduces signal
distortion. The planes should be pulled back from all trans-
mission lines and component mounting pads a distance
equal to the width of the widest transmission line or the thick-
ness of the dielectric separating the transmission line from
the internal power or ground plane(s) whichever is greater.
Doing so minimizes effects on transmission line impedances
and reduces unwanted parasitic capacitances at component
mounting pads.
In especially noisy power supply environments, such as is
often the case when using switching power supplies, sepa-
rate filtering may be used at the CLC020’s VCO and output
driver power pins. The CLC020 was designed for this situa-
tion. The digital section, VCO and output driver power supply
feeds are independent (see pinout description table and pi-
nout drawing for details). Supply filtering may take the form
of L-section or pi-section, L-C filters in series with these V
inputs. Such filters are available in a single package from
several manufacturers. Despite being independent feeds, all
device power supplies should be applied simultaneously as
from a common source. The CLC020 is free from power sup-
ply latch-up caused by circuit-induced delays between the
device’s three separate power feed systems.
REPLACING THE GENNUM GS9022
The CLC020 is form-fit-function compatible with the Gennum
GS9022. The CLC020 can improve the performance of
GS9022 applications using the existing PCB layout with the
removal of certain components or changes to component
values. New layouts using the CLC020 will benefit from the
greatly reduced ancilliary component count and more com-
pact layout.
The CLC020 does not require external VCO filtering compo-
nents. The external VCO filtering components at pin 17 of
the GS9022 may remain connected to the CLC020 without
complications. It is suggested that these be removed from
DS100917-11
FIGURE 10. Jitter Plots
C
www.national.com
13
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC020BCQ | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| CLC020BCQ/NOPB | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| CLC021 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:SMPTE 259M Digital Video Serializer with EDH Generation and Insertion |
| CLC02-10N_-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ceramic Core Laser Cut Chip Inductor |
| CLC02-12N_-RC | 制造商:ALLIED 制造商全稱:Allied Components International 功能描述:Ceramic Core Laser Cut Chip Inductor |
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