參數(shù)資料
型號: CLC016AJQ
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Data Retiming PLL with Automatic Rate Selection
中文描述: SPECIALTY TELECOM CIRCUIT, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 14/20頁
文件大?。?/td> 422K
代理商: CLC016AJQ
Product Description
(Continued)
Observe the output current requirements of the driving
device.
Figure 16 and Figure 17 show DC and AC coupled interface
examples which meet these four conditions.
OUTPUT INTERFACES
SDO, SDO, SCO, and SCO swing at ECL logic levels when
the correct external components are used. However, the out-
puts are not standard emitter-coupled logic outputs. Instead,
the signals flow from the collectors of the output transistors.
The primary advantage of this architecture is lower power
dissipation. Some example interfaces follow.
Differential Load-Terminated Output Interface
Figure 18 shows an interface to drive signals differentially
over a coaxial cable. The diode establishes V
. The diode-
resistor network sets V
. The resistors terminate the cable
in its characteristic impedance.
Differential Source-Terminated Output Interface
Figure 19 is similar to Figure 18 except that the termination
is placed near the output pins.
Terminating Physically Separated Outputs
When the circuit design requires the outputs to be routed to
separate locations, the recommended interface is depicted
in Figure 20 Choose the resistors for an equivalent 75
ter-
mination of the cable impedance (or other cable characteris-
tic impedance, as appropriate).
DS100087-28
FIGURE 16. Differential 75
Source
DS100087-29
FIGURE 17. AC Coupled Termination
DS100087-30
FIGURE 18. Differential Load-Terminated
Output Interface
DS100087-31
FIGURE 19. Differential Source-
Terminated Output Interface
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