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| 型號： | CK2540-9ERD3TB1 |
| 英文描述： | 150 Watt DC-DC and AC-DC Converters |
| 中文描述： | 150瓦的DC - DC和AC - DC轉(zhuǎn)換器 |
| 文件頁數(shù)： | 30/34頁 |
| 文件大小： | 605K |
| 代理商： | CK2540-9ERD3TB1 |
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K Series Data Sheet
150 Watt DC-DC and AC-DC Converters
APR 26, 2006 revised to MAY 15, 2006
Page 30 of 34
www.power-one.com
Table 22: Undervoltage monitor functions
V output
(VME compatible)
Monitoring
Minimum adjustment range
of threshold level Vt
Vti
V min- V max
V min- V max
V min- V max
V min- V max
Typical hysteresis Vh[% of Vt]
for Vt min- Vt max
Vhi
3.4 - 0.4
V
yes
Vo1
no
Vto
–
Vho
–
V2
1
V3
yes
yes
1
0.95 - 0.985 Vo1
2
3.4 - 0.4
"0"
V0
yes
no
3, 4
–
3.4 - 0.4
–
yes
yes
3, 4
0.95 - 0.985 Vo1
2
3.4 - 0.4
"0"
1
Threshold level adjustable by potentiometer.
2
Fixed value between 95% and 98.5% of Vo1(tracking).
3
Adjusted at Io nom.
4
Fixed value, resistor-adjusted (±2% at 25 °C) acc. to customer's specifications; individual type number is determined by Power-One.
Table 21: Available internal input capacitance and factory potentiometer setting of Vi with resulting hold-up time
Types
AK
BK
FK
CK
DK
EK
LK
Unit
C min
V i
th
0.83
0.3
1.2
0.66
0.26
0.21
0.21
mF
9.5
19.5
39
39
61
97
120
VDC
0.1
0.1
3.4
1.1
1.1
2.7
4.2
ms
Option V: ACFAIL signal (VME)
Available only for models with
V
o= 5.1 V.
This option defines an undervoltage monitoring circuit for the
input and main output voltage. It generates an ACFAIL signal
(V signal) which conforms to the VME standard.
The low state level of the ACFAIL signal is specified at a sink
current of
I
V
≤
48 mA to
V
V
≤
0.6 V (open-collector output of an
NPN transistor). The pull-up resistor feeding the open-collector
output should be placed on the VME backplane.
After the ACFAIL signal has gone low, the VME standard
requires a hold-up time (
t
h)of at least 4 ms before the 5.1 V
output drops to 4.875 V when the output is fully loaded. The
hold-up time is provided by the internal input capacitance.
Consequently, the working input voltage and the threshold level
(
V
ti)should be adequately above the minimum input voltage
(
V
i min) of the converter so that enough energy is remaining in
the input capacitance. If the input voltage is below the required
level, an external hold-up capacitor (
C
i ext) should be added.
Formula for threshold level for desired value of th:
2 P
o
(th+ 0.3 ms) 100
Vi= ––––––––––––––––––––– + V min2
C min
η
Formula for the external input capacitor:
2 Po (th+ 0.3 ms) 100
C ext= –––––––––––––––––––––– – C
i min
η
(Vi 2– V min2)
where as:
C
i min
= internal input capacitance [mF]
C
i ext
= external input capacitance [mF]
Po
= output power [W]
η
= efficiency [%]
th
= hold-up time [ms]
V
i min
= minimum input voltage [V]1
V
ti
= threshold level [V]
1Min. input voltage according to Electrical Input Data For output voltages
Vo
>
Vo nom, the minimum input voltage increases proportionally to
Vo/Vo nom.
Remarks:
Option V2 and V3 can be adjusted by potentiometer to a threshold
level between
V
i minand
V
i max. A decoupling diode should be
connected in series with the input of AK - FK converters to avoid
the input capacitance discharging through other loads connected
to the same source voltage.
V+ Vh. The threshold level V
ti
is either adjustable by
potentiometer, accessible through a hole in the front cover,
or adjusted during manufacture to a determined customer
specified value.
Versions V0, V2, and V3 are available as shown below.
Option V operates independently of the built-in input
undervoltage lockout circuit. A logic "low" signal is generated at
pin 20 as soon as one of the monitored voltages drops below the
preselected threshold level V
t
.The return for this signal is Vo1–.
The V output recovers when the monitored voltage(s) exceed(s)
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