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參數(shù)資料
| 型號(hào)： | CDS-1402MC |
| 廠商： | MURATA POWER SOLUTIONS INC |
| 元件分類： | 取樣保持放大器 |
| 中文描述： | SAMPLE AND HOLD AMPLIFIER, 0.06 us ACQUISITION TIME, CDIP24 |
| 封裝： | CERAMIC, DDIP-24 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 203K |
| 代理商： | CDS-1402MC |
CDS-1402
7
CALIBRATION PROCEDURE
Offset Adjust (Figure 5)
Offset and pedestal errors may be compensated for by
applying external voltages to pin 1 (OFFSET ADJUST V1) and/
or pin 9 (OFFSET ADJUST V2) using either voltage-output
DAC’s or potentiometers configured to appear as voltage
sources.
1. Connect pin 8 (S/H2 SUMMING NODE) either directly to pin
7 (S/H1 ROUT) or through a 100 Ohm potentiometer to pin
6 (S/H1 OUT).
2. Tie pins 3 (ANALOG INPUT 1) and 4 (ANALOG INPUT 2) to
pin 5 (ANALOG GROUND).
3. Adjust OFFSET ADJUST V1 (while S/H1 is in the hold
mode) until pin 6 (S/H1 OUT) equals 0V.
4. Adjust OFFSET ADJUST V2 (while S/H2 is in the hold
mode) until pin 22 (V OUT) equals 0V.
5. To negate the effect of output droop on the offset-adjust
process, each S/H must be continually switched between its
sample and hold modes and adjusted so its output equals
zero immediately after going into the hold mode.
The sensitivity of the voltage offset adjustments is 5mV per Volt.
Pins 1 and 9 should be left open (floating) when not being used
for offset adjustment.
Gain Matching Adjustment (Differential Gain)
between S/H1 and S/H2
The user can adjust the gain matching (differential gain)
between S/H1 and S/H2 by leaving pin 7 (S/H1 ROUT) floating
(open) and connecting a 100 Ohm potentiometer between pin
6 (S/H1 OUT) and pin 8 (S/H2 SUMMING NODE). Note, offset
adjustment should take place before gain matching adjustment.
Apply a full-scale input to both pin 3 (ANALOG INPUT 1) and
pin 4 (ANALOG INPUT 2). Adjust the 100 Ohm potentio-
meter (with both S/H's in the sample mode) until pin 22
(V OUT) is 0V.
If gain matching adjustment is not required, leave pin 6 (S/H1
OUT) floating (open) and tie pin 7 (S/H1 ROUT) to pin 8 (S/H2
SUMMING NODE).
OFFSET ADJUST V1
1
+5V
–5V
DO NOT CONNECT
2
ANALOG INPUT 1
3
ANALOG INPUT 2
4
ANALOG GROUND
5
S/H1 OUT
6
S/H1 ROUT
7
S/H2 SUMMING NODE
8
OFFSET ADJUST V2
9
+5V
–5V
DO NOT CONNECT
10
S/H1 COMMAND
11
S/H2 COMMAND
12
100
0.1F
2.2F
+5V
+
0.1F
2.2F
+
–5V
0.1F
2.2F
+5V
+
24
23
22
21
20
19
18
17
16
15
14
13
ANALOG GROUND
V OUT
ANALOG GROUND
A/D CLOCK 2
A/D CLOCK 1
+5V DIGITAL SUPPLY
DIGITAL GROUND
ANALOG GROUND
–5V ANALOG SUPPLY
+5V ANALOG SUPPLY
CDS-1402
Figure 5. CDS-1402 Typical Connection Diagram
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