參數(shù)資料
型號: CDP68HC68T1M2
廠商: HARRIS SEMICONDUCTOR
元件分類: XO, clock
英文描述: CMOS Serial Real-Time Clock With RAM and Power Sense/Control
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO16
文件頁數(shù): 11/24頁
文件大?。?/td> 139K
代理商: CDP68HC68T1M2
11
Power Sense
This bit is used to enable the line input pin to sense a power
failure. It is set high for this function. When power sense is
selected, the input to the 50Hz to 60Hz prescaler is discon-
nected. Therefore, crystal operation is required when power
sense is enabled. An interrupt is generated when a power
failure is sensed and the power sense and Interrupt True bit
in the Status Register are set. When power sense is acti-
vated, a “0” must be written to this location followed by a “1”
to re-enable power sense.
Alarm
The output of the alarm comparator is enabled when this bit
is set high. When a comparison occurs between the sec-
onds, minutes and hours time and alarm counters, the inter-
rupt output is activated. When loading the time counters, this
bit should be set low to avoid a false interrupt. This is not
required when loading the alarm counters. See Pin Func-
tions, INT for explanation of alarm delay.
Periodic Select
The value in these 4 bits will select the frequency of the peri-
odic output. (See Table 2).
INTERRUPT CONTROL REGISTER (Write/Read) - Address 32H
D7
D6
D5
D4
D3
D2
D1
D0
WATCHDOG
POWER
DOWN
POWER
SENSE
ALARM
PERIODIC SELECT
NOTE: All bits are reset by power-on reset.
TABLE 2. PERIODIC INTERRUPT OUTPUT
D0 - D3 VALUE
PERIODIC INTERRUPT
OUTPUT FREQUENCY
FREQUENCY TIME BASE
XTAL
LINE
0
Disable
1
2048Hz
X
2
1024Hz
X
3
512Hz
X
4
256Hz
X
5
128Hz
X
6
64Hz
X
50 or 60Hz
X
7
32Hz
X
8
16Hz
X
9
8Hz
X
10
4Hz
X
11
2Hz
X
X
12
1Hz
X
X
13
Minute
X
X
14
Hour
X
X
15
Day
X
X
CDP68HC68T1
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