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參數(shù)資料
| 型號(hào)： | CDP6872M |
| 廠商： | INTERSIL CORP |
| 元件分類： | XO, clock |
| 英文描述： | Low Power Crystal Oscillator |
| 中文描述： | 10 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 101K |
| 代理商： | CDP6872M |
5
CDP6872
Crystal Selection
For general purpose applications, a Parallel Mode Crystal is
a good choice for use with the CDP6872. However for
applications where a precision frequency is required, the
designer needs to consider other factors.
Crystals are available in two types or modes of oscillation,
Series and Parallel. Series Mode crystals are manufactured
to operate at a specified frequency with zero load capaci-
tance and appear as a near resistive impedance when oscil-
lating. Parallel Mode crystals are manufactured to operate
with a specific capacitive load in series, causing the crystal
to operate at a more inductive impedance to cancel the load
capacitor. Loading a crystal with a different capacitance will
“pull” the frequency off its value.
The CDP6872 has 4 operating frequency ranges. The higher
three ranges do not add any loading capacitance to the
oscillator circuit. The lowest range, 10kHz to 100kHz, auto-
matically switches in two 15pF capacitors onto OSC IN and
OSC OUT to eliminate potential start-up problems. These
capacitors create an effective crystal loading capacitor equal
to the series combination of these two capacitors. For the
CDP6872, in the lowest range, the effective loading capaci-
tance is 7.5pF. Therefore the choice for a crystal, in this
range, should be a Parallel Mode crystal that requires a
7.5pF load.
In the higher 3 frequency ranges, the capacitance on OSC
IN and OSC OUT will be determined by package and layout
parasitics, typically 4 to 5pF. Ideally the choice for crystal
should be a Parallel Mode set for 2.5pF load. A crystal man-
ufactured for a different load will be “pulled” from its nominal
frequency (see Crystal Pullability).
FIGURE 2.
CDP6872
+
-
+5V
VREG
C
1
C
2
XTAL
C
3
2
OSC IN
3
OSC OUT
1
V
DD
Frequency Fine Tuning
Two Methods will be discussed for fine adjustment of the
crystal frequency. The first and preferred method (Figure 2),
provides better frequency accuracy and oscillator stability
than method two (Figure 3). Method one also eliminates
start-up problems sometimes encountered with 32kHz tun-
ing fork crystals.
For best oscillator performance, two conditions must be met:
the capacitive load must be matched to both the inverter and
crystal to provide ideal conditions for oscillation, and the fre-
quency of the oscillator must be adjustable to the desired
frequency. In Method two these two goals can be at odds
with each other; either the oscillator is trimmed to frequency
by de-tuning the load circuit, or stability is increased at the
expense of absolute frequency accuracy.
Method one allows these two conditions to be met indepen-
dently. The two fixed capacitors, C
1
and C
2
, provide the opti-
mum load to the oscillator and crystal. C
3
adjusts the
frequency at which the circuit oscillates without appreciably
changing the load (and thus the stability) of the system.
Once a value for C
3
has been determined for the particular
type of crystal being used, it could be replaced with a fixed
capacitor. For the most precise control over oscillator fre-
quency, C
3
should remain adjustable.
This three capacitor tuning method will be more accurate
and stable than method two and is recommended for 32kHz
tuning fork crystals; without it they may leap into an overtone
mode when power is initially applied.
Method two has been used for many years and may be pre-
ferred in applications where cost or space is critical. Note
that in both cases the crystal loading capacitors are con-
nected between the oscillator and V
DD
; do not use V
SS
as an
AC ground. The Simplified Block Diagram shows that the
oscillating inverter does not directly connect to V
SS
but is ref-
erenced to V
DD
and V
RN
. Therefore V
DD
is the best AC
ground available.
FIGURE 3.
CDP6872
+
-
+5V
VREG
C
1
C
2
XTAL
2
OSC IN
3
OSC OUT
1
V
DD
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