參數(shù)資料
型號: CDP1877CE
廠商: HARRIS SEMICONDUCTOR
元件分類: 中斷控制器
英文描述: Programmable Interrupt Controller (PIC)
中文描述: CDP1800 SERIES COMPATIBLE, INTERRUPT CONTROLLER, PDIP28
文件頁數(shù): 7/10頁
文件大?。?/td> 45K
代理商: CDP1877CE
4-88
PIC Application Examples
Example 1 - Single PIC Application
Figure 2 shows all the connections required between CPU
and PIC to handle eight levels of interrupt control.
Programming
Programming the PIC consists of the following steps:
1. Disable interrupt at CPU
2. Reset Master Interrupt Bit, B3, of Control Register.
3. Write a “1” into the Interrupt Input bit location of the Mask
Register, if masking is desired.
4. Write the High-Order Address byte into the Page
Register.
5. Write the Low-Order Address and the vector interval into
the Control Register.
6. Program R(1) of the CPU to point to the PIC so that the
Long Branch instruction can be read from the PIC during
the Interrupt Service routine.
Values for Example 1 with LOCATION 84E0 arbitrarily cho-
sen as the Vector Address with interval of eight bytes, IR4
pending, is shown in Table 1.
In deriving the above addresses, all Don’t Care bits are
assumed to be 0.
When an INTERRUPT (IR4) is received by the CPU, it will
address the PIC and will branch to the interrupt service
routine.
The three bytes generated by the PIC will be:
1st Byte = C0
H
2nd Byte = 84
H
3rd Byte = E0
H
FIGURE 2. PIC AND CPU CONNECTION DIAGRAM
MA7
MA6
MA5
MA4
MWR
MRD
TPA
TPB
INT
BUS
CS/A
X
CS/A
Y
CS
CS
MWR
MRD
TPA
TPB
INT
BUS
CDP1877
CDP1802
CPU
PIC
CASC
V
DD
IR7
IR6
IR5
IR4
IR3
IR2
IR1
IR0
TABLE 1. REGISTER ADDRESS VALUES
REGISTER
REGISTER ADDRESS
OPERATION
DATA BYTE
MASK
E000H
WRITE
00
H
CONTROL
E040H
WRITE
CE
H
PAGE
E080H
WRITE
84
H
STATUS
E000H
READ
10
H
POLLING
E040H
READ
E0
H
R(1) (IN CPU)
E080H
-
-
CDP1877, CDP1877C
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