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參數(shù)資料
| 型號(hào)： | CDP1852CD3 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High-Reliability Byte-Wide Input/Output Port |
| 中文描述： | 8 I/O, PIA-GENERAL PURPOSE, CDIP24 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 218K |
| 代理商： | CDP1852CD3 |
3
:
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (V
DD
):
(All Voltages Referenced to V
SS
Terminal)
CDP1852/3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +11V
CDP1852C/3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, any One Input
. . . . . . . . . . . . . . . . . . . . . . . . .±
10mA
Thermal Resistance (Typical)
SBDIP Package. . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor
T
A
= Full Package Temperature Range
(All Package Types). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mW
Operating Temperature Range (T
A
)
Package Type D . . . . . . . . . . . . . . . . . . . . . . . . .-55
o
C to +125
o
C
Storage Temperature Range (T
STG
) . . . . . . . . . . . .-65
o
C to +150
o
C
Lead Temperature (During Soldering):
At distance 1/16
±
1/32 in (1.59
±
0.79mm)
From Case for 10s max. . . . . . . . . . . . . . . . . . . . . . . . . . . +265
o
C
θ
JA
(
o
C/W)
65
θ
JC
(
o
C/W)
20
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended Operating Conditions
T
A
= Full-Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges.
PARAMETER
LIMITS
UNITS
CPP1852/3
CDP1852C/3
MIN
MAX
MIN
MAX
DC Operating Voltage Range
4
10.5
4
6.5
V
Input Voltage Range
V
SS
V
DD
V
SS
V
DD
V
Static Electrical Specifications
V
IN
= 0 or V
DD
, Except as Noted
PARAMETER
SYMBOL
TEST CONDITIONS
LIMITS
UNITS
-
55
o
C, +25
o
C
+125
o
C
MIN
MAX
MIN
MAX
Quiescent Device Current (Note 1)
I
DD
V
DD
= 5V
-
10
-
100
μ
A
V
DD
= 10V
-
20
-
300
μ
A
Output Low Drive (Sink) Current
I
OL
V
DD
= 5V, V
O
= 0.4V
2.6
-
1.9
-
mA
V
DD
= 10V, V
O
= 0.5V
6.1
-
4.1
-
mA
Output High Drive (Source) Current
I
OH
V
DD
= 5V, V
O
= 4.6V
-1.8
-
-1.3
-
mA
V
DD
= 10V, V
O
= 9.5V
-4.4
-
-2.9
-
mA
Output Voltage Low Level
V
OL
V
DD
= 5V, I
OL
= 0
μ
A
-
0.1
-
0.2
V
V
DD
= 10V, I
OL
= 0
μ
A
-
0.1
-
0.2
V
Output Voltage High Level
V
OH
V
DD
= 5V, I
OL
= 0
μ
A
4.9
-
4.8
-
V
V
DD
= 10V, I
OL
= 0
μ
A
9.9
-
9.8
-
V
Input Low Voltage
V
IL
V
DD
= 5V, V
O
= 0.2, 4.8V
-
1.5
-
1.5
V
V
DD
= 10V, V
O
= 0.2, 9.8V
-
3
-
3
V
Input High Voltage
V
IH
V
DD
= 5V, V
O
= 0.2, 4.8V
3.5
-
3.5
-
V
V
DD
= 10V, V
O
= 0.2, 9.8V
7
-
7
-
V
Input Leakage Low
I
IL
V
DD
= 5V, V
IN
= 0V
-
-1
-
-5
μ
A
V
DD
= 10V, V
IN
= 0V
-
-1
-
-5
μ
A
Input Leakage High
I
IH
V
DD
= 5V, V
IN
= 5V
-
1
-
5
μ
A
V
DD
= 10V, V
IN
= 10V
-
1
-
5
μ
A
CDP1852/3, CDP1852C/3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDP1852 | parallel, 8-bit, mode-pro-grammable input/output ports.(并行8位可編程模式I/O端口) |
| CDP1852C | parallel, 8-bit, mode-pro-grammable input/output ports.(并行8位可編程模式I/O端口) |
| CDP1853C | High-Reliability CMOS N-Bit 1 of 8 Decoder |
| CDP1853CD3 | High-Reliability CMOS N-Bit 1 of 8 Decoder |
| CDP1853 | N-Bit 1 of 8 Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1852CE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1852D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Byte-Wide Input/Output Port |
| CDP1852D/B | 制造商:Rochester Electronics LLC 功能描述: |
| CDP1852D3 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability Byte-Wide Input/Output Port |
| CDP1852E | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
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