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參數(shù)資料
| 型號： | CDP1851E |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Programmable I/O Interface |
| 中文描述： | 20 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 56K |
| 代理商： | CDP1851E |
4-14
Dynamic Electrical Specifications
At T
A
= -40
o
C to +85
o
C, V
DD
±
5%, t
r
, t
f
= 20ns, V
IH
= 0.7 V
DD
, V
IL
= 0.3 V
DD
, C
L
= 100pF
PARAMETER
V
DD
(V)
LIMITS
UNITS
CDP1851
CDP1851C
MIN
(NOTE 1)
TYP
(NOTE 2)
MAX
MIN
(NOTE 1)
TYP
(NOTE 2)
MAX
INPUT MODE SEE FIGURES 4 AND 5
Minimum Setup Times:
Chip Select to CLOCK
t
CSCL
5
-
50
75
-
50
75
ns
10
-
25
40
-
-
-
ns
RD/WE to CLOCK
t
RWCL
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
WR/RE to CLOCK
t
WRCL
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
Data in to STROBE
t
DlST
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
Minimum Hold Times:
Chip Select After CLOCK
t
HCSCL
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
Address After TPB
t
HATPB
5
-
-50
0
-
-50
0
ns
10
-
-25
0
-
-
-
ns
Data In After STROBE
t
HSTDl
5
-
50
75
-
50
75
ns
10
-
25
40
-
-
-
ns
Data Bus Out After Address
t
HADOH
5
50
325
500
50
325
500
ns
10
25
165
250
-
-
-
ns
Propagation Delay Times:
TPB to INT
t
PINT
5
-
200
300
-
200
300
ns
10
-
100
150
-
-
-
ns
STROBE to INT
t
STlNT
5
-
200
300
-
200
300
ns
10
-
100
150
-
-
-
ns
TPB to RDY
t
TPRDY
5
-
250
375
-
250
375
ns
10
-
125
200
-
-
-
ns
STROBE to RDY
t
STRDY
5
-
260
400
-
260
400
ns
10
-
130
200
-
-
-
ns
Minimum Pulse Widths:
CLOCK
t
WCL
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
TPB
t
WTPB
5
-
75
120
-
75
120
ns
10
-
40
60
-
-
-
ns
STROBE
t
WST
5
-
100
150
-
100
150
ns
10
-
50
75
-
-
-
ns
Access Time, Address to Data
Bus Out
t
ADA
5
-
325
500
-
325
500
ns
10
-
165
250
-
-
-
ns
NOTES:
1. Typical values are for T
A
= 25
o
C and nominal voltages.
2. Maximum limits of minimum characteristics are the values above which all devices function.
CDP1851, CDP1851C
相關PDF資料 |
PDF描述 |
|---|---|
| CDP18523 | High-Reliability Byte-Wide Input/Output Port |
| CDP1852CD | Byte-Wide Input/Output Port |
| CDP1852CE | Byte-Wide Input/Output Port |
| CDP1852D | Byte-Wide Input/Output Port |
| CDP1852E | Byte-Wide Input/Output Port |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1852 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Byte-Wide Input/Output Port |
| CDP1852 DIE | 制造商:Harris Corporation 功能描述: |
| CDP1852/3 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability Byte-Wide Input/Output Port |
| CDP18523 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability Byte-Wide Input/Output Port |
| CDP1852C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Byte-Wide Input/Output Port |
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