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參數(shù)資料
| 型號(hào)： | CDP1851CEX |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Programmable I/O Interface |
| 中文描述： | 20 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 文件頁(yè)數(shù)： | 3/14頁(yè) |
| 文件大?。?/td> | 56K |
| 代理商： | CDP1851CEX |
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4-7
Functional Description
The CDP1851 has four modes of operation: input, output,
bidirectional, and bit-programmable. Port A is programmable
in all modes; port B is programmable in all but the
bidirectional mode. A control byte must be loaded into the
control register to program the ports. In the input and output
modes, each port has two handshaking signals, STROBE
and RDY. In the bidirectional mode, port A has four
handshaking signals: A RDY and A STROBE for input, B
RDY and B STROBE for output. If port A is programmed in
the bidirectional mode, port B must be programmed in the
bit-programmable mode. Each terminal of port A or B may
be individually programmed for input or output in the bit-
programmable mode. Since handshaking is not used in this
mode, the RDY and STROBE lines may also be used for bit-
programming if port A is not in the bidirectional mode.
Input Mode
When a peripheral device has data to input, it sends a
STROBE pulse to the PlO. The leading edge of this pulse
clears the RDY line, inhibiting further transmission from the
peripheral. The trailing edge of the STROBE pulse latches the
data into the PlO buffer register and also activates the INT line
to signal the CPU to read this data. The lNT pin can be wired
to the INT pin of the CPU or the EF lines for polling. The CPU
Static Electrical Specifications
At T
A
= -40
o
C to +85
o
C, V
DD
5%, Unless Otherwise Specified
PARAMETER
CONDITIONS
LIMITS
UNITS
V
O
(V)
V
IN
(V)
V
DD
(V)
CDP1851
CDP1851C
MIN
(NOTE1)
TYP
MAX
MIN
(NOTE1)
TYP
MAX
Quiescent Device Current
I
DD
-
0, 5
5
-
0.01
50
-
0.02
200
μ
A
-
0, 10
10
-
1
200
-
-
-
μ
A
Output Low Drive
(Sink) Current
I
OL
0.4
0, 5
5
1.6
3.2
-
1.6
3.2
-
mA
0.5
0, 10
10
2.6
5.2
-
-
-
-
mA
Output High Drive
(Source) Current
I
OH
4.6
0, 5
5
-1.15
-2.3
-
-1.15
-2.3
-
mA
9.5
0, 10
10
-2.6
-5.2
-
-
-
-
mA
Output Voltage Low-Level
(Note 2)
V
OL
-
0, 5
5
-
0
0.1
-
0
0.1
V
-
0, 10
10
-
0
0.1
-
-
-
V
Output Voltage High Level
(Note 2)
V
OH
-
0, 5
5
4.9
5
-
4.9
5
-
V
-
0, 10
10
9.9
10
-
-
-
-
V
Input Low Voltage
V
IL
0.5,
4.5
-
5
-
-
1.5
-
-
1.5
V
0.5,
9.5
-
10
-
-
3
-
-
-
V
Input High Voltage
V
lH
0.5,
4.5
-
5
3.5
-
-
3.5
-
-
V
0.5,
9.5
-
10
7
-
-
-
-
-
V
Input Leakage Current
I
lN
Any
Input
0, 5
5
-
-
±
1
-
-
±
1
μ
A
0, 10
10
-
-
±
2
-
-
-
μ
A
Three-State Output Leakage
Current
I
OUT
0, 5
0, 5
5
-
-
±
1
-
-
±
1
μ
A
0, 10
0, 10
10
-
-
±
1
-
-
-
μ
A
Operating Current (Note 3)
I
DD1
-
0, 5
5
-
1.5
3
-
1.5
3
mA
-
0, 10
10
-
6
12
-
-
-
mA
Input Capacitance
C
IN
C
OUT
-
-
-
-
5
7.5
-
5
7.5
pF
Output Capacitance
-
-
-
-
10
15
-
10
15
pF
NOTES:
1. Typical values are for T
A
= 25
o
C and nominal V
DD
.
2. I
OL
= I
OH
= 1
μ
A
3. Operating current is measured at 200kHz for V
DD
= 5V and 400kHz for V
DD
= 10V, with open output (worst-case frequencies for
CDP1802A system operating at maximum speed of 3.2MHz).
CDP1851, CDP1851C
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CDP1851D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| CDP1851DX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable I/O Interface |
| CDP1851E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1852 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Byte-Wide Input/Output Port |
| CDP1852 DIE | 制造商:Harris Corporation 功能描述: |
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