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參數(shù)資料
| 型號： | CDP1851CE |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Programmable I/O Interface |
| 中文描述： | 20 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 56K |
| 代理商： | CDP1851CE |
4-18
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ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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DATA BUS
RA1/RA0
RD/WE = (MRD)
WR/WE = (TPB)
I/O SPACE
RD/WE = (MWR)
WR/RE = (MRD)
MEMORY SPACE
CS
CLOCK = (TPA)
DATA-OUT
STROBE
RDY
INT
t
WINT
t
WTPB
t
WRDY
t
WST
t
STRDY
t
STINT
VALID DATA OUT
t
WCL
t
HCSCL
t
CSCL
t
WRCL
t
WDO
t
WW
(NOTE 1)
t
RWCL
t
AW
t
HAW
VALID PORT ADDRESS
IO OR II
VALID DATA
t
DW
t
DW
NOTE:
1. Write is the overlap of WR/RE = 1 and RD/WE = 0
FIGURE 7. OUTPUT MODE TIMING WAVEFORMS
CDP1851, CDP1851C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDP1851CEX | CMOS Programmable I/O Interface |
| CDP1851DX | CMOS Programmable I/O Interface |
| CDP1851E | CMOS Programmable I/O Interface |
| CDP18523 | High-Reliability Byte-Wide Input/Output Port |
| CDP1852CD | Byte-Wide Input/Output Port |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1851CEX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable I/O Interface |
| CDP1851D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| CDP1851DX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Programmable I/O Interface |
| CDP1851E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1852 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Byte-Wide Input/Output Port |
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