參數(shù)資料
型號(hào): CDP1824D3
廠商: HARRIS SEMICONDUCTOR
元件分類: DRAM
英文描述: High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
中文描述: 32 X 8 STANDARD SRAM, 375 ns, CDIP18
文件頁(yè)數(shù): 4/5頁(yè)
文件大小: 111K
代理商: CDP1824D3
45
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Write Cycle Dynamic Electrical Specifications
Input t
R
, t
F
15ns, C
L
= 50pF
PARAMETER
SYMBOL
TEST
CONDITIONS
LIMITS
UNITS
-55
o
C, +25
o
C
+125
o
C
V
DD
(V)
(NOTE 1)
MIN
MAX
(NOTE 1)
MIN
MAX
Write Pulse Width
t
WRW
5
350
-
475
-
ns
10
180
-
220
-
ns
Data Setup Time
t
DS
5
400
-
560
-
ns
10
190
-
260
-
ns
Data Hold Time
t
DH
5
70
-
90
-
ns
10
35
-
45
-
ns
Chip Select Setup Time
t
CS
5
550
-
775
-
ns
10
340
-
475
-
ns
Address Setup Time
t
AS
5
550
-
775
-
ns
10
340
-
475
-
ns
NOTE:
1. Time required by a device to allow for the indicated function.
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
MA
CS
MWR
BUS
t
AS
t
CS
t
WRW
t
DS
t
DH
CDP1824/3, CDP1824C/3
相關(guān)PDF資料
PDF描述
CDP1824EX 32-Word x 8-Bit Static RAM
CDP1824 32-Word x 8-Bit Static RAM
CDP1824C 32-Word x 8-Bit Static RAM
CDP1824D 32-Word x 8-Bit Static RAM
CDP1824E 32-Word x 8-Bit Static RAM
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