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參數(shù)資料
| 型號： | CDP1824CD |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | 32-Word x 8-Bit Static RAM |
| 中文描述： | 32 X 8 STANDARD SRAM, 710 ns, CDIP18 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-18 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 111K |
| 代理商： | CDP1824CD |
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
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reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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Write Cycle Dynamic Electrical Specifications
Input t
R
, t
F
≤
15ns, C
L
= 50pF
PARAMETER
SYMBOL
TEST
CONDITIONS
LIMITS
UNITS
-55
o
C, +25
o
C
+125
o
C
V
DD
(V)
(NOTE 1)
MIN
MAX
(NOTE 1)
MIN
MAX
Write Pulse Width
t
WRW
5
350
-
475
-
ns
10
180
-
220
-
ns
Data Setup Time
t
DS
5
400
-
560
-
ns
10
190
-
260
-
ns
Data Hold Time
t
DH
5
70
-
90
-
ns
10
35
-
45
-
ns
Chip Select Setup Time
t
CS
5
550
-
775
-
ns
10
340
-
475
-
ns
Address Setup Time
t
AS
5
550
-
775
-
ns
10
340
-
475
-
ns
NOTE:
1. Time required by a device to allow for the indicated function.
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
MA
CS
MWR
BUS
t
AS
t
CS
t
WRW
t
DS
t
DH
CDP1824/3, CDP1824C/3
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| CDP18243 | High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory |
| CDP1826C | CMOS 64-Word x 8-Bit Static RAM |
| CDP1826CE | CMOS 64-Word x 8-Bit Static RAM |
| CDP1851C | CMOS Programmable I/O Interface(CMOS 可編程I/O接口) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1824CD3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1824CDX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CDP1824CE | 制造商:Harris Corporation 功能描述: 制造商:RCA 功能描述: |
| CDP1824CEX | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:32-Word x 8-Bit Static RAM |
| CDP1824D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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