參數(shù)資料
型號(hào): CDP1822C
廠商: Intersil Corporation
英文描述: High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM
中文描述: 高可靠性的CMOS 256字× 4位LSI的靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù): 4/5頁(yè)
文件大?。?/td> 27K
代理商: CDP1822C
6-22
Write Cycle Dynamic Electrical Specifications
t
R
, t
F
= 10ns, C
L
= 50pF
PARAMETER
SYMBOL
V
DD
(V)
LIMITS
UNITS
+25
o
C, -55
o
C
+125
o
C
MIN
MAX
MIN
MAX
Write Cycle (Note 1)
t
WC
5
400
-
560
-
ns
Address Setup (Note 1)
t
AS
5
160
-
225
-
ns
Address Hold (Note 1)
t
AH
5
40
-
55
-
ns
Write Pulse Width (Note 1)
t
WRW
5
200
-
280
-
ns
Data in Setup (Note 1)
t
DIS
5
200
-
280
-
ns
Data in Hold (Note 1)
t
DIH
5
40
-
55
-
ns
Chip Select 1 Setup
t
CSS1
5
200
-
280
-
ns
Chip Select 2 Setup
t
CSS2
5
200
-
280
-
ns
Output Disable Setup
t
ODS
5
140
-
225
-
ns
NOTE:
1. Limits designate 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing
A0 - A7
CHIP-SELECT 1
CHIP-SELECT 2
OUTPUT DISABLE
DI1 - DI4
READ/WRITE
DON’T CARE
NOTE 1
t
WRW
t
CSS2
t
CS2H
t
ODS
t
AS
t
DIS
t
DIH
t
CSIH
t
AH
t
WC
t
CSSI
DATA IN STABLE
(NOTE 1)
NOTE:
1. t
ODS
is required for common I/O operation only; for separate I/O operations, output disable is don’t care.
FIGURE 3. WRITE CYCLE TIMING WAVEFORMS
CDP1822C/3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDP1822C3 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Reliability CMOS 256-Word x 4-Bit LSI Static RAM
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CDP1822CDX 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM
CDP1822CE 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256-Word x 4-Bit LSI Static RAM