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參數(shù)資料
| 型號： | CDP1805ACDX |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| 中文描述： | 8-BIT, 5 MHz, MICROPROCESSOR, CDIP40 |
| 封裝： | SIDE BRAZED, DIP-40 |
| 文件頁數(shù)： | 27/30頁 |
| 文件大小： | 301K |
| 代理商： | CDP1805ACDX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當前第27頁第28頁第29頁第30頁
27
S1
0
2
SPM2
CNTR - 1 ON EF2 AND TPA
HIGH Z
R2
1
1
0
S1
0
3
SCM2
CNTR - 1 ON EF2 0 TO 1
HIGH Z
R3
1
1
0
S1
0
4
SPM1
CNTR - 1 ON EF1 AND TPA
HIGH Z
R4
1
1
0
S1
0
5
SCM1
CNTR - 1 ON EF1 0 TO 1
HIGH Z
R5
1
1
0
S1
0
6
LDC
CNTR STOPPED: D
→
CH,
CNTR; 0
→
CI
CNTR RUNNING: D
→
CH
D
R6
1
1
0
S1
0
7
STM
CNTR - 1 ON TPA
÷
32
HIGH Z
R7
1
1
0
S1
0
8
GEC
CNTR
→
D
CNTR
R8
1
1
0
S1
0
9
ETQ
IF CNTR THRU 0: Q
→
Q
HIGH Z
R9
1
1
0
S1
0
A
XIE
1
→
XIE
HIGH Z
RA
1
1
0
S1
0
B
XID
0
→
XIE
HIGH Z
RB
1
1
0
S1
0
C
CIE
1
→
CIE
HIGH Z
RC
1
1
0
S1
0
D
CID
0
→
CIE
HIGH Z
RD
1
1
0
S1#1
2
0-F
DBNZ
RN - 1
→
RN
HIGH Z
RN
1
1
0
#2
2
0-F
DBNZ
MRP
→
B; RP + 1
→
RP
MRP
RP
0
1
0
#3
2
0-F
DBNZ
TAKEN: B
→
RP.1, MRP
→
RP.0
NOT TAKEN: RP + 1
→
RP
M(RP + 1)
RP + 1
0
1
0
S1
3
E
BCI
TAKEN: MRP
→
RP.0;
0
→
CI
NOT TAKEN: RP + 1
→
RP
MRP
RP
0
1
0
S1
3
F
BXI
TAKEN: MRP
→
RP.0
NOT TAKEN: RP + 1
→
RP
MRP
RP
0
1
0
S1#1
6
0-F
RLXA
MRX
→
B, RX + 1
→
RX
MRX
RX
0
1
0
#2
6
0-F
RLXA
B
→
T; MRX
→
B; RX + 1
→
RX
M(RX + 1)
RX + 1
0
1
0
#3
6
0-F
RLXA
B, T
→
RN.0, RN.1
HIGH Z
RN
1
1
0
S1#1
7
4
DADC
MRX + D + DF
→
DF, D
MRX
RX
0
1
0
#2
7
4
DADC
DECIMAL ADJUST
→
DF, D
HIGH Z
RD
1
1
1
S1#1
7
6
DSAV
RX - 1
→
RX
HIGH Z
RP
1
1
0
#2
7
6
DSAV
T
→
MRX; RX - 1
→
RX
T
RX - 1
1
0
0
#3
7
6
DSAV
D
→
MRX; RX - 1
→
RX
SHIFT D RIGHT WITH CARRY
D
RX - 2
1
0
0
#4
7
6
DSAV
D
→
MRX
D
RX - 3
1
0
0
S1#1
7
7
DSMB
D - MRX - (NOT DF)
→
DF, D
MRX
RX
0
1
0
#2
7
7
DSMB
DECIMAL ADJUST
→
DF, D
HIGH Z
RP
1
1
0
S1#1
7
C
DACI
MRP + D + DF
→
DF, D;
RP + 1
→
RP
MRP
RP
0
1
0
#2
7
C
DACI
DECIMAL ADJUST
→
DF, D
HIGH Z
RP + 1
1
1
0
S1#1
7
F
DSBI
D - MRP - (NOT DF)
→
DF, D;
RP + 1
→
RP
MRP
RP
0
1
0
TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)
STATE
I
N
MNEMONIC
OPERATION
DATA
BUS
MEMORY
ADDRESS
MRD
MWR
N
LINES
CDP1805AC, CDP1806AC
相關PDF資料 |
PDF描述 |
|---|---|
| CDP1805ACE | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1805ACQ | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806AC | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806ACD | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806ACQ | CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1805ACE | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1805ACH DIE | 制造商:Harris Corporation 功能描述: |
| CDP1805ACQ | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806AC | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
| CDP1806ACD | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer |
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