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參數(shù)資料
| 型號(hào)： | CDB44800 |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR CS44800 PWM CTRL |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Popguard® |
| 放大器類(lèi)型： | D 類(lèi) |
| 輸出類(lèi)型： | 8 通道 |
| 電源電壓： | 20 V ~ 50 V |
| 工作溫度： | -10°C ~ 70°C |
| 板類(lèi)型： | 完全填充 |
| 已用 IC / 零件： | CS44800 |
| 已供物品： | 板，軟件 |
| 產(chǎn)品目錄頁(yè)面： | 758 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | CS44800-CQZR-ND - IC AMP CTLR DGTL 8CH 64-LQFP 598-1070-ND - IC AMP CTLR DGTL 8CH 64LQFP |
| 其它名稱(chēng)： | 598-1532 CDB-44800 |
3
Precision Edge
SY100E222L
Micrel, Inc.
M9999-021511
hbwhelp@micrel.com or (408) 955-1690
Pin Number
Pin Name
Pin Function
2MR
100k ECL compatible: Master reset function resets all outputs to a differential LOW when
MR pin goes HIGH.
5, 6,
CLK0, /CLK0,
Differential inputs: These input pairs are the differential signal inputs to the device. Inputs
8, 9
CLK1, /CLK1
accept 100k LVPECL/LVECL levels.
7
CLK_SEL
100k ECL compatible input select. LOW = CLK0, HIGH= CLK1.
3
FSELA
100k ECL compatible bank A output select. LOW: QA0-QA1 = ÷1, HIGH: QA0-QA1 = ÷2.
4
FSELB
100k ECL compatible bank B output select. LOW: QB0-QB2 = ÷1, HIGH: QB0-QB2 = ÷2.
11
FSELC
100k ECL compatible bank C output select. LOW: QC0-QC3 = ÷1, HIGH: QC0-QC3 = ÷2.
12
FSELD
100k ECL compatible bank D output select. LOW: QD0-QD5 = ÷1, HIGH: QD0-QD5 = ÷2.
51, 49,
QA0 – QA1,
Bank A 100k differential output pairs controlled by FSELA.
50, 48
/QA0 – /QA1
FSELA: LOW, QA = ÷1, HIGH, QA = ÷2.
46, 44, 42,
QB0 – QB2,
Bank B 100k differential output pairs controlled by FSELB.
45, 43, 41
/QB0 – /QB2
FSELB: LOW, QB = ÷1, HIGH, QB = ÷2.
38, 36, 34, 32,
QC0 – QC3,
Bank C 100k differential output pairs controlled by FSELC.
37, 35, 33, 31
/QC0 – /QC3
FSELC: LOW, QC = ÷1, HIGH, QC = ÷2.
26, 24, 22, 20,
QD0 – QD5,
Bank D 100k differential output pairs controlled by FSELD.
18, 16, 25, 23,
/QD0 – /QD5
FSELD: LOW, QD = ÷1, HIGH, QD = ÷2.
21, 19, 17, 15
1
VCC
Positive power supply: Bypass with 0.1F0.01F low ESR capacitors.
14, 27, 30, 39,
VCCO
Positive power supply for output buffers. Bypass with 0.1F0.01F low ESR capacitors.
40, 47, 52
13
VEE
Negative power supply. For LVPECL systems, VEE is GND.
10
VBB
Reference voltage.
28, 29
NC
No connect: Not internally connected (unused pins).
PIN DESCRIPTION
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