參數(shù)資料
型號： CD74ACT175M96
元件分類： 通用總線功能
英文描述： Quad D-Type Flip-Flop
中文描述： 四D型觸發(fā)器
文件頁數(shù)： 5/6頁
文件大?。?/td> 86K
代理商： CD74ACT175M96
CD54AC08, CD74AC08
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCHS307B
–
JANUARY 2001
–
REVISED MAY 2001
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
th
tsu
50% VCC
10%
tf
50%
10%
90%
90%
VCC
VCC
0 V
0 V
tr
Reference
Input
Data
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50% VCC
510%
tf
50%
10%
90%
90%
VCC
VOH
VOL
0 V
tr
Input
In-Phase
Output
50% VCC
tPLH
tPHL
510%
50%
10%
90%
90%
VOH
VOL
tr
tf
tPHL
tPLH
Out-of-Phase
Output
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
1 MHz, ZO = 50
, tr = 3 ns, tf = 3 ns.
Phase relationships between waveforms are arbitrary.
D. For clock inputs, fmax is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time with one input transition per measurement.
F. tPLH and tPHL are the same as tpd.
G. tPZL and tPZH are the same as ten.
H. tPLZ and tPHZ are the same as tdis.
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2
×
VCC
Open
GND
R1 = 500
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
50% VCC
50% VCC
VCC
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
×
VCC
GND
TEST
S1
Output
Control
Output
Waveform 1
S1 at 2
×
VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈
VCC
0 V
50% VCC
20% VCC
50% VCC
≈
0 V
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
50% VCC
50% VCC
80% VCC
VCC
R2 = 500
When VCC = 1.5 V, R1 = R2 = 1 k
VOLTAGE WAVEFORMS
RECOVERY TIME
50% VCC
VCC
0 V
CLR
Input
CLK
50% VCC
VCC
trec
0 V
Figure 1. Load Circuit and Voltage Waveforms
相關(guān)PDF資料
PDF描述
CD74ACT20M96 Dual 4-input NAND Gate
CD74ACT283M96 BINARY ADDER|ACT-CMOS|SOP|16PIN|PLASTIC
CD74ACT534E FLIP-FLOP|OCTAL|D TYPE|ACT-CMOS|DIP|20PIN|PLASTIC
CD74ACT540M96 8-Bit Inverting Buffer/Driver
CD74ACT540SM 8-Bit Inverting Buffer/Driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CD74ACT175M96E4 功能描述:觸發(fā)器 Quad D-Type Flip-Flop with Reset RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
CD74ACT175M96G4 功能描述:觸發(fā)器 Quad D-Type Flip- Flops RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
CD74ACT175ME4 功能描述:觸發(fā)器 Quad D-Type Flip-Flop with Reset RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
CD74ACT175MG4 功能描述:觸發(fā)器 Quad D-Type Flip- Flops RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
CD74ACT191 制造商:TI 制造商全稱:Texas Instruments 功能描述:Presettable Synchronous 4-Bit Binary Up/Down Counter
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*