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參數(shù)資料
| 型號(hào)： | CD74AC191M |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable Synchronous 4-Bit Binary Up/Down Counter |
| 中文描述： | 可預(yù)置同步4位二進(jìn)制加/減計(jì)數(shù)器 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大小： | 51K |
| 代理商： | CD74AC191M |
7
Propagation Delay
CE to RC
t
PLH
, t
PHL
1.5
-
-
137
-
-
151
ns
3.3
4.4
-
15.4
4.2
-
16.9
ns
5
3.1
-
11
3
-
12.1
ns
Input Capacitance
C
I
-
-
-
10
-
-
10
pF
Power Dissipation Capacitance
C
PD
(Note 14)
-
-
96
-
-
96
-
pF
ACT TYPES
Propagation Delay
PL to Qn
t
PLH
, t
PHL
5
(Note 13)
4.2
-
14.8
4.1
-
16.3
ns
Propagation Delay
Pn to Qn
t
PLH
, t
PHL
5
3.9
-
13.8
3.8
-
15.2
ns
Propagation Delay
CP to Qn
t
PLH
, t
PHL
5
4.1
-
14.5
4
-
16
ns
Propagation Delay
CP to RC
t
PLH
, t
PHL
5
3.1
-
10.9
3
-
12
ns
Propagation Delay
CP to TC
t
PLH
, t
PHL
5
5.2
-
18.2
5
-
20
ns
Propagation Delay
U/D to RC
t
PLH
, t
PHL
5
5.6
-
19.7
5.4
-
21.7
ns
Propagation Delay
U/D to TC
t
PLH
, t
PHL
5
3.8
-
13.5
3.7
-
14.9
ns
Propagation Delay
CE to RC
t
PLH
, t
PHL
5
3.3
-
11.5
3.2
-
12.7
ns
Input Capacitance
C
I
-
-
-
10
-
-
10
pF
Power Dissipation Capacitance
C
PD
(Note 14)
-
-
96
-
-
96
-
pF
NOTES:
11. Limits tested 100%.
12. 3.3V Min is at 3.6V, Max is at 3V.
13. 5V Min is at 5.5V, Max is at 4.5V
14. C
PD
is used to determine the dynamic power consumption per package.
P
D
= C
PD
V
CC2
f
i
+ (C
L
+ V
CC
2 f
o
) where f
i
= input frequency, f
o
= output frequency, C
L
= output load capacitance, V
CC
= supply voltage.
FIGURE 1.
FIGURE 2.
Switching Specifications
Input t
r
, t
f
= 3ns, C
L
= 50pF (Worst Case)
(Continued)
PARAMETER
SYMBOL
V
CC
(V)
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
1/f
MAX
CP
Qn OR TC
V
S
t
PHL
t
W
t
PLH
INPUT LEVEL
V
S
V
S
V
S
CP OR CE
RC
t
PHL
V
S
INPUT LEVEL
t
PLH
V
S
V
S
V
S
CD74AC191, CD74ACT191
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