參數(shù)資料
型號: CD6420
廠商: Cirrus Logic, Inc.
英文描述: FULL DUPLEX SPEAKERPHONE CHIP
中文描述: 的全雙工免提通話芯片
文件頁數(shù): 21/52頁
文件大小: 815K
代理商: CD6420
CS6420
DS205PP2
21
Noise and Grounding
Since the CS6420 is a mixed-signal integrated cir-
cuit, the system designer must pay special attention
to layout and decoupling to minimize noise con-
cerns. The three best methods to reduce noise when
using the CS6420 are to have good decoupling of
power supplies, separation of analog and digital
power and ground, and careful board layout.
Figure 6 shows the suggested placement of decou-
pling capacitors for the power supplies. Note that
the trace length from the power pin to the capaci-
tors is minimized. Also note that the smaller valued
capacitor is placed closer to the pin than the larger
valued capacitor. The smaller capacitor decouples
high frequency noise and the larger capacitor atten-
uates lower frequencies.
The separation of analog and digital power and
ground is done in two ways. The power is separated
by deriving the digital power for the CS6420 from
the analog through a ferrite bead to isolate analog
from digital, as shown in Figure 7. The ferrite bead
serves as a low-pass filter to remove CS6420 digi-
tal switching noise from the analog power supply.
The ground is separated by isolating all the digital
components of the system board on one ground
plane and all the analog and linear components on
a different ground plane. The CS6420 should be
placed over the analog ground plane. This prevents
digital switching noise from the digital components
of the board from coupling into the converters and
aliasing into the passband.
+5V
(Analog)
AVDD
AGND
DVDD
DGND
Analog Ground Plane
Digital Ground Plane
Microcontroller
1
μ
F
0.1
μ
F
0.1
μ
F
1
μ
F
Ferrite Bead
Figure 7. Ground Planes
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