參數(shù)資料
型號： CD54HC670F3A
廠商： Texas Instruments, Inc.
元件分類： 通用總線功能
英文描述： High-Speed CMOS Logic 4x4 Register File
中文描述： 高速CMOS邏輯4 × 4寄存器文件
文件頁數(shù)： 4/14頁
文件大?。?/td> 284K
代理商： CD54HC670F3A
4
Quiescent Device
Current
I
CC
V
CC
or
GND
0
6
-
-
8
-
80
-
160
μ
A
Three- State Leakage
Current
V
IL
or V
IH
V
O
=
V
CC
or
GND
6
-
-
±
0.5
-
±
5.0
-
±
10
μ
A
HCT TYPES
High Level Input
Voltage
V
IH
-
-
4.5 to
5.5
2
-
-
2
-
2
-
V
Low Level Input
Voltage
V
IL
-
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
High Level Output
Voltage
TTL Loads
-6
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
6
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I
I
V
CC
and
GND
0
5.5
-
±
0.1
-
±
1
-
±
1
μ
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
5.5
-
-
8
-
80
-
160
μ
A
Three- State Leakage
Current
V
IL
or V
IH
V
O
=
V
CC
or
GND
5.5
-
-
±
0.5
-
±
5.0
-
±
10
μ
A
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
I
CC
(Note 4)
V
CC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
μ
A
NOTE:
4. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
WE
0.3
WA0
0.2
WA1
0.4
RE
1.5
DATA
0.15
RA0
0.4
RA1
0.7
NOTE: UnitLoadis
I
CC
limitspecific inDCElectrical Specifications
Table, e.g., 360
μ
A max. at 25
o
C.
CD54HC670, CD74HC670, CD74HCT670
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