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    參數(shù)資料
    型號: CD4508BD
    元件分類: 通用總線功能
    英文描述: LATCH|DUAL|4-BIT|CMOS|DIP|24PIN|CERAMIC
    中文描述: 鎖存|雙| 4位|的CMOS |雙酯| 24針|陶瓷
    文件頁數(shù): 1/7頁
    文件大?。?/td> 81K
    代理商: CD4508BD
    2002 Fairchild Semiconductor Corporation
    DS005989
    www.fairchildsemi.com
    October 1987
    Revised April 2002
    C
    CD4503BC
    Hex Non-Inverting 3-STATE Buffer
    General Description
    The CD4503BC is a hex non-inverting 3-STATE buffer with
    high output current sink and source capability. 3-STATE
    outputs make it useful in bus-oriented applications. Two
    separate disable inputs are provided. Buffers 1 through 4
    are controlled by the disable 4 input. Buffers 5 and 6 are
    controlled by the disable 2 input. A high level on either dis-
    able input will cause those gates on its control line to go
    into a high impedance state.
    Features
    I
    Wide supply voltage range:
    3.0 V
    DC
    to 18 V
    DC
    I
    3-STATE outputs
    I
    Symmetrical turn on/turn off delays
    I
    Symmetrical output rise and fall times
    I
    Pin-for-pin replacement for MM80C97 and MC14503
    Ordering Code:
    Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
    Connection Diagram
    Top View
    Schematic Diagram
    Truth Table
    X
    =
    Don't Care
    Order Number
    CD4503BCM
    CD4503BCSJ
    CD4503BCN
    Package Number
    M16A
    M16D
    N16E
    Package Description
    16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
    16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
    16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
    In
    Disable
    Input
    0
    0
    1
    Out
    0
    1
    X
    0
    1
    3-STATE
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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