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參數(shù)資料
| 型號(hào)： | CD43-470 |
| 廠(chǎng)商： | Microsemi Corporation |
| 英文描述： | 1.0MHz Inverting DC/DC Converter |
| 中文描述： | 1.0MHz倒轉(zhuǎn)DC / DC轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 198K |
| 代理商： | CD43-470 |
Microsemi
Microsemi Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3
Copyright
2002
Rev. 3.0a, 2005-03-14
W
M
.
C
LX1734
1.0MHz Inverting DC/DC Converter
TM
E L E C T R I C A L C H A R A C T E R I S T I C S
Unless otherwise specified, the following specifications apply over the operating ambient temperature 0
°
C
≤
T
A
≤
85
°
C and the following
test conditions: V
IN
= 5V
LX1734
Typ
Parameter
Symbol
Test Conditions
Min
Max
Units
Minimum Operating Voltage
V
IN
Under Voltage Lockout
Reference Voltage
Reference Voltage Line Regulation
NFB Pin Bias Current
Quiescent Current
Quiescent Current
Switching Frequency
Maximum Duty Cycle
Switch V
CESAT
Switch Leakage Current
Switch Circuit Current Limit
V
IN
UVLO
V
NFB
I
NFB
I
Q
I
SHDN
V
SDH
V
SDL
V
IN
rising, regulator remains off
4.5V
<
V
IN
<
5.5V, T
AMB
> 25°C
(Regulator Not Switching, V
NFB
= -2V)
V
< 0.28V
I
OUT
= 5mA to 250mA
I
SW
= 600mA
V
SW
= 10V
Duty Cycle < 50%
Device Active
Device Disabled
V
= 0.28V
= 5V
4.25
4.25
V
V
V
mV
μ
A
mA
μA
MHz
%
mV
μ
A
mA
V
V
μA
3.2
-1.205 -1.235 -1.255
-4
9
0.8
82
650
0.02
700
2
-5
0.4
18
-8
12
300
1.4
800
1
0.8
1.0
SD
High
Low
SD
Shutdown Input Voltage
Bias
Current
I
SD
SD
V
30
50
μA
B L O C K D I A G R A M
Q2
Q1
V
IN
NFB
R2 (External)
100k
40pF
Q
Q
SET
CLR
S
R
Q3
0.1
Σ
SW
GND
Ramp
Generator
1.1MHz
Oscillator
+
-
+
-
-
+
R1 (External)
C
PL
V
OUT
UVLO
SD
BIAS
Figure 2
– Simplified Block Diagram
E
L
E
C
T
R
I
C
A
L
S
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