參數(shù)資料
型號(hào)： CD4051BMS
廠商： Intersil Corporation
英文描述： CMOS Analog Signal 8-Channel Multiplexers/Demultiplexers(CMOS 單端8通道模擬多路轉(zhuǎn)換器)
中文描述： CMOS模擬信號(hào)8通道多路復(fù)用器/解復(fù)用器（的CMOS單端8通道模擬多路轉(zhuǎn)換器）
文件頁(yè)數(shù)： 4/12頁(yè)
文件大小： 149K
代理商： CD4051BMS
7-940
Specifications CD4051BMS, CD4052BMS, CD4053BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±
10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
o
C
At Distance 1/16
±
1/32 Inch (1.59mm
±
0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . .
Flatpack Package . . . . . . . . . . . . . . . .
Maximum Package Power Dissipation (PD) at +125
o
C
For TA = -55
o
C to +100
o
C (Package Type D, F, K). . . . . . 500mW
For TA = +100
o
C to +125
o
C (Package Type D, F, K) . . . . .Derate
θ
ja
θ
jc
80
o
C/W
70
o
C/W
20
o
C/W
20
o
C/W
Linearity at 12mW/
o
C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
(NOTE 1)
VDD = 20V, VIN = VDD or GND
GROUP A
SUBGROUPS
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
1
7
7
8A
8B
1, 2, 3
TEMPERATURE
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C, +125
o
C, -55
o
C
LIMITS
MIN
-
-
-
-100
-1000
-100
-
-
-
-
-
-
-
-
-
-
-
-
-2.8
0.7
VOH >
VDD/2
UNITS
μ
A
μ
A
μ
A
nA
nA
nA
nA
nA
nA
V
V
V
MAX
10
1000
10
-
-
-
100
1000
100
1050
1300
800
400
550
310
240
320
220
-0.7
2.8
VOL <
VDD/2
VDD = 18V, VIN = VDD or GND
VIN = VDD or GND
Input Leakage Current
IIL
VDD = 20
VDD = 18V
VDD = 20
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 18V
On-State Resistance
RL = 10K Returned to
VDD - VSS/2
RON
VDD = 5V
VIS = VSS to VDD
VDD = 10V
VIS = VSS to VDD
VDD = 15V
VIS = VSS to VDD
N Threshold Voltage
P Threshold Voltage
Functional
(Note 4)
VNTH
VPTH
F
VDD = 10V, ISS = -10
μ
A
VSS = 0V, IDD = 10
μ
A
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
VDD = 5V = VIS thru 1k,
VEE = VSS
RL = 1k to VSS, |IIS| < 2
μ
A
OFF Channels
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Off Channel Leakage
Any Channel OFF
Or
All Channels Off
(Common Out/In)
VIL
-
1.5
V
VIH
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
3.5
-
V
VIL
VDD = 15V = VIS thru 1K
VEE = VSS
RL = 1K to VSS, |ISS|, <2
μ
A
On All OFF Channels
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
4
V
VIH
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
11
-
V
IOZL
VIN = VDD or GND
VOUT = 0V
VDD = 20V
1
2
3
1
2
3
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
-0.1
-1.0
-0.1
-
-
-
-
-
-
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
VDD = 18V
VDD = 20V
IOZH
VIN = VDD or GND
VOUT = VDD
0.1
1.0
0.1
VDD = 18V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
4. VDD = 2.8V/3.0V, RL = 200k to VDD
VDD = 20V/18V, RL = 10k to VDD
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