參數(shù)資料
型號： CD4040BCMX
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 計(jì)數(shù)器
中文描述： 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16
封裝： 0.150 INCH, MS-012, SOIC-16
文件頁數(shù)： 8/10頁
文件大小： 355K
代理商： CD4040BCMX
CD4040BC,
12-Sta
g
e
Ripple
Carr
y
Binar
y
Counter
s
CD4060BC,
14-Sta
g
e
Ripple
Carr
y
Binar
y
Counter
s
1987 Fairchild Semiconductor Corporation
www.fairchildsemi.com
CD4040BC, DCD4060BC Rev. 1.5
7
AC Electrical Characteristics(5)
CD4060BC TA = 25°C, CL = 50pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted.
Note:
5. AC Parameters are guaranteed by DC correlated testing.
RC Oscillator Notes:
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
tPHL4, tPLH4
Propagation Delay Time to Q4
VDD = 5V
550
1300
ns
VDD = 10V
250
525
VDD = 15V
200
400
tPHL, tPLH
Interstage Propagation Delay Time
from Qn to Qn+1
VDD = 5V
150
330
ns
VDD = 10V
60
125
VDD = 15V
45
90
tTHL, tTLH
Transition Time
VDD = 5V
100
200
ns
VDD = 10V
50
100
VDD = 15V
40
80
tWL, tWH
Minimum Clock Pulse Width
VDD = 5V
170
500
ns
VDD = 10V
65
170
VDD = 15V
50
125
trCL, tfCL
Maximum Clock Rise and Fall Time VDD = 5V
No Limit
ns
VDD = 10V
No Limit
VDD = 15V
No Limit
fCL
Maximum Clock Frequency
VDD = 5V
1
3
MHz
VDD = 10V
3
8
VDD = 15V
4
10
tPHL(R)
Reset Propagation Delay
VDD = 5V
200
450
ns
VDD = 10V
100
210
VDD = 15V
80
170
tWH(R)
Minimum Reset Pulse Width
VDD = 5V
200
450
ns
VDD = 10V
100
210
VDD = 15V
80
170
CIN
Average Input Capacitance
Any Input
5
7.5
pF
CPD
Power Dissipation Capacitance
50
pF
1.
R2 = 2 R1 to 10 R1
2.
RC Oscillator applications are not recommended at supply voltages below 7.0V for R1 < 50k
3.
f
≈
1
at VCC = 10V
2.2 R1 CX
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