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參數(shù)資料
| 型號(hào)： | CD4023C |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Triple 3-Input NAND(NOR) Gate |
| 中文描述： | 三3輸入與非（挪威）門(mén) |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大小： | 127K |
| 代理商： | CD4023C |
DC Electrical Characteristics
CD4023BC, CD4025BC (Note 2)
Symbol
Parameter
Conditions
b
40
§
C
a
25
§
C
a
85
§
C
Units
Min
Typ
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current V
DD
e
5V
1.0
2.0
4.0
0.004
0.005
0.006
1.0
2.0
4.0
7.5
15
30
m
A
m
A
m
A
V
DD
e
10V
V
DD
e
15V
V
DD
e
15V, V
O
e
1.5V
(
V
OL
Low Level Output Voltage V
DD
e
5V
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
V
DD
e
10V
V
DD
e
15V
V
OH
High Level Output Voltage V
DD
e
5V
4.95
9.95
14.95
4.95
9.95
14.95
5
4.95
9.95
14.95
V
V
V
V
DD
e
10V
V
DD
e
15V
10
15
V
IL
Low Level Input Voltage
V
DD
e
5V, V
O
e
4.5V
V
DD
e
10V, V
O
e
9.0V
1.5
3.0
4.0
2
4
6
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
l
I
O
l
k
1
m
A
V
DD
e
15V, V
O
e
13.5V
(
V
IH
High Level Input Voltage
V
DD
e
5V, V
O
e
0.5V
V
DD
e
10V, V
O
e
1.0V
3.5
7.0
11.0
3.5
7.0
11.0
3
6
9
3.5
7.0
11.0
V
V
V
l
I
O
l
k
1
m
A
I
OL
Low Level Output Current V
DD
e
5V, V
O
e
0.4V
(Note 3)
0.52
1.3
3.6
0.44
1.1
3.0
0.88
2.2
8
0.36
0.90
2.4
mA
mA
mA
V
DD
e
10V, V
O
e
0.5V
V
DD
e
15V, V
O
e
1.5V
I
OH
High Level Output Current V
DD
e
5V, V
O
e
4.6V
(Note 3)
b
0.52
b
1.3
b
3.6
b
0.44
b
1.1
b
3.0
b
0.88
b
2.2
b
8
b
0.36
b
0.90
b
2.4
mA
mA
mA
V
DD
e
10V, V
O
e
9.5V
V
DD
e
15V, V
O
e
13.5V
I
IN
Input Current
V
DD
e
15V, V
IN
e
0V
V
DD
e
15V, V
IN
e
15V
b
0.3
0.3
b
10
b
5
b
0.3
10
b
5
b
1.0
1.0
m
A
m
A
0.3
Note 1:
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices
should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2:
V
SS
e
0V unless otherwise specified.
Note 3:
I
OH
and I
OL
are tested one output at a time.
Schematic Diagram
CD4025BM/CD4025BC
TL/F/5956–4
(/3
Device Shown
*
All Inputs Protected
by Standard CMOS Input
Protection Circuit.
3
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