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參數(shù)資料
| 型號： | CD4022BC |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | Divide-by-8 Counter/Divider with 8 Decoded Outputs(帶8個解碼輸出的八進制計數(shù)器/除法器) |
| 中文描述： | 分頻8計數(shù)器/ 8解碼輸出分頻器（帶8個解碼輸出的八進制計數(shù)器/除法器） |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 77K |
| 代理商： | CD4022BC |
www.fairchildsemi.com
4
C
AC Electrical Characteristics
(Note 4)
T
A
=
25
°
C, C
L
=
50 pF, R
L
=
200k, t
rCL
and t
fCL
=
20 ns, unless otherwise specified
Symbol
Parameter
Note 4:
AC Parameters are guaranteed by DC correlated testing.
AC Electrical Characteristics
(Note 4)
T
A
=
25
°
C, C
L
=
50 pF, R
L
=
200k, t
rCL
and t
fCL
=
20 ns, unless otherwise specified
Symbol
Parameter
RESET OPERATION
t
PHL, tPLH
Propagation Delay Time
Carry Out Line
Conditions
Min
Typ
Max
Units
CLOCK OPERATION
t
PHL,
t
PLH
Propagation Delay Time Carry Out Line
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
415
160
130
800
320
250
ns
ns
ns
Carry Out Line
C
L
=
15 pF
240
85
70
480
170
140
ns
ns
ns
Decode Out Lines
500
200
160
1000
400
320
ns
ns
ns
t
TLH
, t
THL
Transition Time Carry Out and Decode Out Lines
t
TLH
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
200
100
360
180
ns
ns
80
100
50
130
200
100
ns
ns
ns
t
THL
40
2
5
80
ns
MHz
MHz
f
CL
Maximum Clock Frequency
Measured with
Respect to Carry
1.0
2.5
Output Line
3.0
6
MHz
ns
ns
t
WL
, t
WH
Minimum Clock Pulse Width
125
45
250
90
35
70
20
15
ns
μ
s
μ
s
μ
s
ns
ns
t
rCL
, t
fCL
Clock Rise and Fall Time
5
t
SU
Minimum Clock Inhibit Data Setup Time
120
40
240
80
32
5
65
7.5
ns
pF
C
IN
Average Input Capacitance
Conditions
Min
Typ
Max
Units
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
V
DD
=
5V
V
DD
=
10V
V
DD
=
15V
415
160
130
800
320
250
ns
ns
ns
Carry Out Line
240
85
70
480
170
140
ns
ns
ns
C
L
=
15 pF
Decode Out Lines
500
200
160
1000
400
320
ns
ns
ns
t
W
Minimum Reset
Pulse Width
200
70
55
400
140
110
ns
ns
ns
t
REM
Minimum Reset
Removal Time
75
30
25
150
60
50
ns
ns
ns
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