參數(shù)資料
型號(hào): CD4019BMS
廠商: Intersil Corporation
英文描述: Single 2-Input NAND Gate with Schmitt-Trigger Input 5-SOT-23 -40 to 85
中文描述: 的CMOS四路和/或選擇門
文件頁(yè)數(shù): 3/4頁(yè)
文件大?。?/td> 107K
代理商: CD4019BMS
DC Electrical Characteristics
CD4019BC (Note 2)
Symbol
Parameter
Conditions
b
55
§
C
Min
a
25
§
C
Typ
a
125
§
C
Min
Units
Max
Min
Max
Max
I
DD
Quiescent Device
Current
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
l
I
O
l
k
1
m
A
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
l
I
O
l
k
1
m
A
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
V
DD
e
5V, V
O
e
0.5V or 4.5V
V
DD
e
10V, V
O
e
1.0V or 9.0V
V
DD
e
15V, V
O
e
1.5V or 13.5V
V
DD
e
5V, V
O
e
0.5V or 4.5V
V
DD
e
10V, V
O
e
1.0V or 9.0V
V
DD
e
15V, V
O
e
1.5V or 13.5V
V
DD
e
5V, V
O
e
0.4V
V
DD
e
10V, V
O
e
0.5V
V
DD
e
15V, V
O
e
1.5V
V
DD
e
5V, V
O
e
4.6V
V
DD
e
10V, V
O
e
9.5V
V
DD
e
15V, V
O
e
13.5V
V
DD
e
15V, V
IN
e
0V
V
DD
e
15V, V
IN
e
15V
1
2
4
0.03
0.05
0.07
1
2
4
7.5
15
30
m
A
m
A
m
A
V
OL
Low Level
Output Voltage
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
V
OH
High Level
Output Voltage
4.95
9.95
14.95
4.95
9.95
14.95
5
4.95
9.95
14.95
V
V
V
10
15
V
IL
Low Level
Input Voltage
1.5
3.0
4.0
2
4
6
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
V
IH
High Level
Input Voltage
3.5
7.0
11.0
3.5
7.0
11.0
3
6
9
3.5
7.0
11.0
V
V
V
I
OL
Low Level Output
Current (Note 3)
0.52
1.3
3.6
0.44
1.1
3.0
1
0.36
0.9
2.4
mA
mA
mA
2.5
10
I
OH
High Level Output
Current (Note 3)
b
0.2
b
0.5
b
1.4
b
0.16
b
0.4
b
1.2
b
0.4
b
1.0
b
3.0
b
10
b
5
10
b
5
b
0.12
b
0.3
b
1.0
mA
mA
mA
I
IN
Input Current
b
0.30
0.30
b
0.30
0.30
b
1.0
1.0
m
A
m
A
Note 1:
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
Note 2:
V
SS
e
0V unless otherwise specified.
Note 3:
I
OH
and I
OL
are tested one output at a time.
AC Electrical Characteristics
*
T
A
e
25
§
C, C
L
e
50 pF, R
L
e
200k, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
,
t
PLH
Propagation Delay,
Input to Output
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
100
50
45
300
120
100
ns
ns
ns
t
THL
High-to-Low Level
Transition Time
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
100
50
40
200
100
80
ns
ns
ns
t
TLH
Low-to-High Level
Transition Time
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
150
70
50
300
140
100
ns
ns
ns
C
IN
Input Capacitance
All A and B Inputs
K
A
and K
B
Inputs
5
7.5
15
pF
pF
10
*
AC Parameters are guaranteed by DC correlated testing.
3
相關(guān)PDF資料
PDF描述
CD4019BC Quad AND-OR Select Gate
CD4019BCM Single 2-Input NAND Gate with Schmitt-Trigger Input 5-SC70 -40 to 85
CD4019BCN Single 2-Input NAND Gate with Schmitt-Trigger Input 5-SC70 -40 to 85
CD4019BCSJ Single 2-Input NAND Gate with Schmitt-Trigger Input 5-SC70 -40 to 85
CD4019BCMX Quad 2-input OR Gate
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