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參數(shù)資料
| 型號(hào)： | CD4011 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Quad 2-Input NOR(NAND) Buffered B Series Gate |
| 中文描述： | 四2輸入或非（閃存）緩沖B系列門 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 164K |
| 代理商： | CD4011 |
Absolute Maximum Ratings
(Notes 1 and 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at any Pin
b
0.5V to V
DD
a
0.5V
Power Dissipation (P
D
)
Dual-In-Line
Small Outline
700 mW
500 mW
V
DD
Range
Storage Temperature (T
S
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
b
0.5 V
DC
to
a
18 V
DC
b
65
§
C to
a
150
§
C
260
§
C
Operating Conditions
Operating Range (V
DD
)
Operating Temperature Range
CD4001BM, CD4011BM
CD4001BC, CD4011BC
3 V
DC
to 15 V
DC
b
55
§
C to
a
125
§
C
b
40
§
C to
a
85
§
C
DC Electrical Characteristics
CD4001BM, CD4011BM (Note 2)
V
DD
e
15V
(
V
IL
Low Level
V
DD
e
5V, V
O
e
4.5V
Input Voltage
V
DD
e
10V, V
O
e
9.0V
V
DD
e
15V, V
O
e
13.5V
V
IH
High Level
V
DD
e
5V, V
O
e
0.5V
Input Voltage
V
DD
e
10V, V
O
e
1.0V
V
DD
e
15V, V
O
e
1.5V
I
OL
Low Level Output
V
DD
e
5V, V
O
e
0.4V
Current
V
DD
e
10V, V
O
e
0.5V
(Note 3)
V
DD
e
15V, V
O
e
1.5V
I
OH
High Level Output
V
DD
e
5V, V
O
e
4.6V
Current
V
DD
e
10V, V
O
e
9.5V
(Note 3)
V
DD
e
15V, V
O
e
13.5V
I
IN
Input Current
V
DD
e
15V, V
IN
e
0V
V
DD
e
15V, V
IN
e
15V
Symbol
Parameter
Conditions
b
55
§
C
a
25
§
C
a
125
§
C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device
Current
V
DD
e
5V, V
IN
e
V
DD
or V
SS
V
DD
e
10V, V
IN
e
V
DD
or V
SS
V
DD
e
15V, V
IN
e
V
DD
or V
SS
V
DD
e
5V
V
DD
e
10V
0.25
0.50
1.0
0.004
0.005
0.006
0.25
0.50
1.0
7.5
15
30
m
A
m
A
m
A
V
OL
Low Level
Output Voltage
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
l
I
O
l
k
1
m
A
V
DD
e
15V
(
V
DD
e
5V
V
DD
e
10V
V
OH
High Level
Output Voltage
4.95
9.95
14.95
4.95
9.95
14.95
5
4.95
9.95
14.95
V
V
V
l
I
O
l
k
1
m
A
10
15
1.5
3.0
4.0
2
4
6
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
3.5
7.0
11.0
3.5
7.0
11.0
3
6
9
3.5
7.0
11.0
V
V
V
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
b
0.64
b
1.6
b
4.2
b
0.51
b
1.3
b
3.4
b
0.88
b
2.25
b
8.8
b
10
b
5
10
b
5
b
0.36
b
0.9
b
2.4
mA
mA
mA
b
0.10
0.10
b
0.10
0.10
b
1.0
1.0
m
A
m
A
Connection Diagrams
CD4001BC/CD4001BM
Dual-In-Line Package
TL/F/5939–3
Top View
CD4011BC/CD4011BM
Dual-In-Line Package
TL/F/5939–4
Top View
Order Number CD4001B or CD4011B
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD4011BMN | Quad 2-Input NOR,NAND Buffered B Series Gate |
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| CD4011BCN | 16-Bit Bus Transceiver And Register With 3-State Outputs 56-SSOP -40 to 85 |
| CD4011BMS | CMOS NAND Gates |
| CD4011BT | Single 2-Input Positive-NAND Gate 5-SC70 -40 to 85 |
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