參數(shù)資料
型號: CD22402D
廠商: INTERSIL CORP
元件分類: 消費(fèi)家電
英文描述: R8C Series, 23 Group, WDTO 48P6Q-A
中文描述: SPECIALTY CONSUMER CIRCUIT, CDIP24
封裝: SIDE BRAZED, DIP-24
文件頁數(shù): 10/11頁
文件大?。?/td> 76K
代理商: CD22402D
8-49
Typical Applications
(Refer to Application Note AN8742, for more information)
NOTES:
7. Waveforms shown are for 525 line/60Hz, line number in parenthesis are for (625 line/50Hz).
8. Timing widths by clock count; for 525 line, 1 CLK = 1.98
μ
s; for 625 line, 1 CLK = 2
μ
s; 1 horizontal period = 32 CLKS.
FIGURE 10. EXPANDED VERTICAL-TIMING WAVEFORM DETAIL OF SYNC GENERATOR TIMING (MIXED BEAM BLANKING - PIN 7)
Timing Waveforms
(Continued)
SEE NOTES 7, 8
2 CLKS
2 CLKS
PIN 5
PIN 7
PIN 5
PIN 7
LINE 2
LINE 265 (315)
LINE 3
LINE 265-1/2 (315-1/2)
LINE 268-1/2 (318-1/2)
LINE 269 (319)
16 CLKS
4 CLKS
2 CLKS
1 CLK
15 CLKS
4
CLKS
1 CLK
15
CLKS
LINE 6
LINE 7
4 CLKS
2 CLKS
19
20
10
8
6
22
24
1
21
23
2
4
11
7
13
14
9
16
5
15
17
18
HORIZONTAL DRIVE
HORIZONTAL CLAMP
MIXED BEAM (CATHODE) BLANKING
MIXED PROCESSING BLANKING
HORIZONTAL PROCESSING BLANKING
VERTICAL DRIVE
SHORT VERTICAL DRIVE
MIXED SYNC
FRAME SYNC OUTPUT (ODD FIELD)
VERTICAL PROCESSING BLANKING OUTPUT
OPERATION SWITCH FOR 525-LINE OR
625-LINE RASTER
HORIZ.
SYNC
RESTORER
V
DD
HORIZ. PHASE ADJ.
MIXED SYNC. OR
COMPOSITE VIDEO INPUT
VERTICAL SYNC
(OPTIONAL)
FROM SHORT
VERTICAL
DRIVE
PLL
ZERO
CROSSING
DETECTOR
FROM POWER LINE
FOR LINE-LOCK
OPERATION
CRYSTAL
OSC.
1M
AUTO GEN
LOCK
CONTROL
100pF
1M
10k
100pF
GEN LOCK
OSC.
φ
VERT.
3, 12
FIGURE 11. TYPICAL APPLICATION IN A TV CAMERA
CD22402
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