參數(shù)資料
型號(hào): CBT6832DDGG
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 通用總線(xiàn)功能
英文描述: 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion
中文描述: CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153EE, SOT-364-1, TSSOP2-56
文件頁(yè)數(shù): 2/8頁(yè)
文件大小: 67K
代理商: CBT6832DDGG
Philips Semiconductors
Product specification
CBT6832D
16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged
outputs and charge pump undershoot protection for live insertion
2
2000 Sep 01
853-2216 24481
FEATURES
5
typical r
on
Pull-up on B port
Undershoot protection on A port only: –2.0 V
Near zero propagation delay
Controlled enable rate
V
CC
operating range: +4.5 V to +5.5 V
> 100 MHz bandwidth (or clock rate) at 20 pF load capacitance
56-pin TSSOP package
Bias voltage pre-charges the B output when the channel is
disabled
Latch-up protection exceeds 100 mA per JESD78
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
APPLICATION
Provides PCI-X hot-plugging
DESCRIPTION
The CBT6832D is a 16-bit controlled enable rate 1-of-2
multiplexer/demultiplexer with precharged outputs and charge pump
undershoot protection for live insertion. Advantages of the CBT6832
include a propagation delay of 250 ps, resulting from 5
channel
resistance, and low I/O capacitance. A port demultiplexes to either
1B and 2B, or to both. The switch is bi-directional.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
45
46
47
48
49
50
51
52
53
54
55
56
1B1
2A
3B1
4B1
4A
5B1
6B1
6A
7B1
8B1
1A
1B2
2B2
3A
3B2
4B2
5A
6B2
5B2
7A
7B2
8B2
8A
13
14
15
16
17
18
39
40
41
42
43
44
GND
V
CC
9B1
10B1
10A
GND
9A
V
CC
9B2
10B2
11B1
19
38
11A
12B1
20
21
22
23
24
25
32
33
34
35
36
37
12A
13B1
14B1
14A
15B1
11B2
13B2
12B2
14B2
15A
15B2
16B1
26
31 16B2
16A
27
30 V
BIAS2
V
BIAS1
28
29
SEL1
SEL2
2B1
13A
SW00478
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0 V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
OFF B
C
OFF A
C
ON 1
C
ON 2
Propagation delay
An to Bn or Bn to An
Input capacitance
C
L
= 50 pF; V
CC
= 5 V
0.25
ns
V
I
= 0 V or V
CC
Outputs disabled; V
O
= 0 V
Outputs disabled; V
O
= 0 V
One B enabled; V
O
= 0 V
Both B channels enabled; V
O
= 0 V
4.5
pF
B capacitance, switch off
8
pF
A capacitance, switch off
13
pF
One channel enabled capacitance
21
pF
Both channels enabled capacitance
34
pF
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
0
°
C
to +70
°
C
ORDER CODE
DWG NUMBER
56-Pin Plastic TSSOP Type II
CBT6832D DGG
SOT364-1
相關(guān)PDF資料
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