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參數(shù)資料
| 型號： | CBT3245 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal bus switch with output enable |
| 中文描述： | 八路輸出總線開關(guān)啟用 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 81K |
| 代理商： | CBT3245 |
Philips Semiconductors
Preliminary specification
CBT3245
Octal bus switch with output enable
1998 Dec 08
5
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
INPUT
1.5V
OUTPUT
t
PLH
t
PHL
SA00028
1.5V
1.5V
1.5V
3 V
0 V
V
OH
V
OL
Waveform 1. Input to Output Propagation Delays
Output Control
(Low-level
enabling
1.5 V
t
PZH
t
PHZ
V
OH
V
OL
t
PZL
t
PLZ
3.5V
0V
V
OL
+ 0.3V
V
OH
– 0.3V
SA00029
1.5 V
1.5 V
1.5 V
0V
3V
Output
Waveform 1
S1 at 7 V
(see Note)
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
Output
Waveform 2
S1 at Open
(see Note)
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
C
L
= 50 pF
500
Load Circuit
DEFINITIONS
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
TEST
S1
t
pd
open
t
PLZ
/t
PZL
7 V
t
PHZ
/t
PZH
open
SA00012
500
From Output
Under Test
S1
7 V
Open
GND
NOTES:
1. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, Z
O
= 50
, t
r
≤
2.5 ns, t
f
≤
2.5 ns.
2. The outputs are measured one at a time with one transition per measurement.
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