Table 7. CAPACITANCE (TA = 25C, f = " />
參數(shù)資料
型號: CAT5140ZI-00-GT3
廠商: ON Semiconductor
文件頁數(shù): 5/10頁
文件大?。?/td> 0K
描述: IC POT DGTL 256TAP I2C/EEP 8MSOP
標(biāo)準(zhǔn)包裝: 3,000
接片: 256
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 100 ppm/°C
存儲器類型: 非易失
接口: I²C
電源電壓: 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
CAT5140
http://onsemi.com
4
Table 7. CAPACITANCE (TA = 25C, f = 1.0 MHz, VCC = 5 V)
Test
Test Conditions
Symbol
Max
Units
Input/Output Capacitance (SDA)
VI/O = 0 V
CI/O (Note 9)
8
pF
Input Capacitance (SCL, WP)
VIN = 0 V
CIN (Note 9)
6
pF
Table 8. POWER UP TIMING (Notes 9 and 10)
Parameter
Symbol
Max
Units
Power-up to Read Operation
tPUR
1
ms
Power-up to Write Operation
tPUW
1
ms
9. This parameter is tested initially and after a design or process change that affects the parameter.
10.tPUR and tPUW are delays required from the time VCC is stable until the specified operation can be initiated.
Table 9. DIGITAL POT TIMING
Parameter
Symbol
Min
Max
Units
Wiper Response Time After Power Supply Stable
tWRPO
50
ms
Wiper Response Time: SCL falling edge after last bit of wiper position data
byte to wiper change
tWR
20
ms
Table 10. ENDURANCE
Parameter
Reference Test Method
Symbol
Min
Max
Units
Endurance
MILSTD883, Test Method 1033
NEND
2,000,000
Cycles
Data Retention
MILSTD883, Test Method 1008
TDR
100
Years
Table 11. A.C. CHARACTERISTICS (VCC = +2.5 V to +5.5 V, 40_C to +85_C unless otherwise specified.)
Parameter
Symbol
Min
Typ
Max
Units
Clock Frequency
fSCL
400
kHz
Clock High Period
tHIGH
600
ns
Clock Low Period
tLOW
1300
ns
Start Condition Setup Time (for a Repeated Start Condition)
tSU:STA
600
ns
Start Condition Hold Time
tHD:STA
600
ns
Data in Setup Time
tSU:DAT
100
ns
Data in Hold Time
tHD:DAT
0
ns
Stop Condition Setup Time
tSU:STO
600
ns
Time the bus must be free before a new transmission can start
tBUF
1300
ns
WP Setup Time
tSU:WP
0
ms
WP Hold Time
tHD:WP
2.5
ms
SDA and SCL Rise Time
tR
300
ns
SDA and SCL Fall Time
tF
300
ns
Data Out Hold Time
tDH
100
ns
Noise Suppression Time Constant at SCL, SDA Inputs
TI
50
ns
SLC Low to SDA Data Out and ACK Out
tAA
1
ms
Non-Volatile Write Cycle Time
tWR
4
10
ms
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