- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄369654 > CAT24C23YIT3 32-Kb I2C CMOS Serial EEPROM PDF資料下載
參數(shù)資料
| 型號(hào)： | CAT24C23YIT3 |
| 英文描述： | 32-Kb I2C CMOS Serial EEPROM |
| 中文描述： | 32 KB的的I2C的CMOS串行EEPROM |
| 文件頁(yè)數(shù)： | 4/18頁(yè) |
| 文件大?。?/td> | 510K |
| 代理商： | CAT24C23YIT3 |
第1頁(yè)第2頁(yè)第3頁(yè)當(dāng)前第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
CAT24C32
4
Doc. No. 1101, Rev. G
2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
POWER-ON RESET (POR)
Each CAT24C32 incorporates Power-On Reset (POR)
circuitry which protects the internal logic against powering
up in the wrong state. The device will power up into
Standby mode after V
CC
exceeds the POR trigger level
and will power down into Reset mode when V
CC
drops
below the POR trigger level. This bi-directional POR
behavior protects the device against ‘brown-out’ failure
following a temporary loss of power.
PIN DESCRIPTION
SCL:
The Serial Clock input pin accepts the clock signal
generated by the Master.
SDA:
The Serial Data I/O pin accepts input data and
delivers output data. In transmit mode, this pin is open
drain. Data is acquired on the positive edge, and is
delivered on the negative edge of SCL.
A
0
, A
1
and A
2
:
The Address inputs set the device ad-
dress that must be matched by the corresponding Slave
address bits. The Address inputs are hard-wired HIGH
or LOW allowing for up to eight devices to be used
(cascaded) on the same bus. When left floating, these
pins are pulled LOW internally.
WP:
When pulled HIGH, the Write Protect input pin
inhibits all write operations. When left floating, this pin
is pulled LOW internally.
FUNCTIONAL DESCRIPTION
The CAT24C32 supports the Inter-Integrated Circuit
(I
2
C) Bus protocol. The protocol relies on the use of a
Master device, which provides the clock and directs bus
traffic, and Slave devices which execute requests. The
CAT24C32 operates as a Slave device. Both Master
and Slave can transmit or receive, but only the Master
can assign those roles.
2
C BUS PROTOCOL
The 2-wire I
2
C bus consists of two lines, SCL and SDA,
connected to the V
CC
supply via pull-up resistors. The
Master provides the clock to the SCL line, and either the
Master or the Slaves drive the SDA line. A ‘0’ is transmitted
by pulling a line LOW and a ‘1’ by letting it stay HIGH.
Data transfer may be initiated only when the bus is not
busy (see A.C. Characteristics). During data transfer,
SDA must remain stable while SCL is HIGH.
START/STOP Condition
An SDA transition while SCL is HIGH creates a START
or STOP condition (Figure 1). The START consists of a
HIGH to LOW SDA transition, while SCL is HIGH. Absent
the START, a Slave will not respond to the Master. The
STOP completes all commands, and consists of a LOW
to HIGH SDA transition, while SCL is HIGH.
Device Addressing
The Master addresses a Slave by creating a START
condition and then broadcasting an 8-bit Slave address.
For the CAT24C32, the first four bits of the Slave address
are set to 1010 (Ah); the next three bits, A
2
, A
1
and A
0
,
must match the logic state of the similarly named input
pins. The R/
bit tells the Slave whether the Master
W
intends to read (1) or write (0) data (Figure 2).
Acknowledge
During the 9
th
clock cycle following every byte sent to
the bus, the transmitter releases the SDA line, allow-
ing the receiver to respond. The receiver then either
acknowledges (ACK) by pulling SDA LOW, or does not
acknowledge (NoACK) by letting SDA stay HIGH (Figure
3). Bus timing is illustrated in Figure 4.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT24C23ZD2I-GT3 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C23ZD2IT3 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C32 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C256WIT3 | 256-Kb I2C CMOS Serial EEPROM |
| CAT24C256 | 256-Kb I2C CMOS Serial EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24C256HU4IGT3 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 LOW-SATURATION VOLTAGE RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C256LGI | 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C256LI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C256LI-G | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (32768x8) 256K RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C256WE-GT3 | 制造商:ON Semiconductor 功能描述:256-KB I2C SERIAL CMOS EEPROM MEMORY SOIC-8 PKG, 3K/REEL - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。