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參數(shù)資料
| 型號(hào)： | CAT24C208WI-GT3 |
| 英文描述： | 8-Kb Dual Port Serial EEPROM |
| 中文描述： | 8 KB的雙端口串行EEPROM |
| 文件頁(yè)數(shù)： | 6/13頁(yè) |
| 文件大小： | 194K |
| 代理商： | CAT24C208WI-GT3 |
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CAT24C208
6
Doc. No. 1044, Rev. F
2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
I
2
C Bus Protocol
The following defines the features of the I
2
C bus protocol:
(1) Data transfer may be initiated only when the bus is
not busy.
(2) During a data transfer, the data line must remain
stable whenever the clock line is high. Any changes
in the data line while the clock line is high will be
interpreted as a START or STOP condition.
START Condition
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of
either SDA when the respective SCL is HIGH. The
CAT24C208 monitors the SDA and SCL lines and will
not respond until this condition is met.
STOP Condition
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The acknowledging
device pulls down the respective SDA line during the ninth
clock cycle, signaling that it received the 8 bits of data.
The CAT24C208 responds with an acknowledge after
receiving a START condition and its slave address. If the
device has been selected along with a write operation, it
responds with an acknowledge after receiving each 8-bit
byte.
When the CAT24C208 is in a READ mode it transmits 8
bits of data, releases the respective SDA line, and
monitors the line for an acknowledge. Once it receives
this acknowledge, the CAT24C208 will continue to
transmit data. If no acknowledge is sent by the Master,
the device terminates data transmission and waits for a
STOP condition.
After an unsuccessful data transfer an acknowledge will
not be issued (NACK) by the slave (CAT24C208), and
the master should abort the sequence. If continued the
device will read from or write to the wrong address in the
two instruction format with the segment pointers.
Figure 2. Acknowledge Timing
1
8
9
START
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
ACK DELAY
ACK SETUP
BUS RELEASE DELAY (RECEIVER)
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT24C208WIT3 | 8-Kb Dual Port Serial EEPROM |
| CAT24C23LI-GT3 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C23LIT3 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C23VP2I-GT3 | 32-Kb I2C CMOS Serial EEPROM |
| CAT24C23VP2IT3 | 32-Kb I2C CMOS Serial EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24C21LI | 功能描述:電可擦除可編程只讀存儲(chǔ)器 1K Dual Mode Serial RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C21WGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C21WGI-T3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C21WI | 功能描述:電可擦除可編程只讀存儲(chǔ)器 1K Dual Mode Serial RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C21WI-G | 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述: |
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