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參數(shù)資料
| 型號： | CAT24C208 |
| 英文描述： | 8-Kb Dual Port Serial EEPROM |
| 中文描述： | 8 KB的雙端口串行EEPROM |
| 文件頁數(shù)： | 10/13頁 |
| 文件大?。?/td> | 194K |
| 代理商： | CAT24C208 |
CAT24C208
10
Doc. No. 1044, Rev. F
2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
CONFIGURATION REGISTER
Function Description:
NB:
AB0:
AB1:
WE DDC:
Number of memory banks in DDC port memory map. 0 = 2 Banks, 1 = 1 Bank
Active Bank Control Bit 0 (See Figure 19)
Active Bank Control Bit 1 (See Figure 19)
Write Enable 0 = Write Disabled, 1= Write Enabled
Note:
WE affects only write operations from the DDC port, not the display port. The display port always has write access.
Figure 19. Configuration Register Truth Table
ARBITRATION
The device performs a simplistic arbitration between the
DDC and DSP ports. While the arbitration scheme
described is not foolproof, it does prevent most errors.
Arbitration logic within the device monitors activity on
DDC_SCL and DSP_SCL. When both I2C ports are idle,
DDC_SCL and DSP_SCL are both high and the
arbitration logic is inactive. When a START condition is
detected on either port, the opposite port SCL line is
pulled low, holding off activity on that port. When the
initiating SCL line has remained high for one full second,
the arbitration logic assumes that the initiating devices is
finished and releases the other SCL line. If the non-
initiating device has been waiting for access, it can now
read or write the device.
1
B
A
0
B
A
B
N
D
I
D
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P
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S
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a
B
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A
0
X
0
0
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0
X
0
1
k
n
a
B
r
p
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U
1
0
0
X
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B
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1
1
0
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r
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X
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1
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o
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L
The configuration register is a non-volatile register and
is available from either DSP or DDC port at address 62h/
63h for write and read resp.
Figure 20. Read Configuration Register
Figure 21. Write Configuration Register
T
R
A
T
S
0
1
0
0
0
1
1
0
K
C
A
S
S
E
R
D
D
A
Y
M
M
U
D
K
C
A
B
N
0
B
A
1
B
A
E
W
X
X
X
X
K
C
A
P
O
T
S
T
R
A
T
S
1
1
0
0
0
1
1
0
K
C
A
A
T
A
D
K
C
A
O
N
P
O
T
S
n
o
c
n
u
F
r
e
t
e
R
B
S
M
B
S
L
7
6
5
4
3
2
1
0
r
e
t
e
R
n
o
a
r
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n
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C
X
X
X
X
E
W
1
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0
B
A
B
N
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24C208WI-G | 功能描述:電可擦除可編程只讀存儲器 8K-Bit Dual Port RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C208WI-GT3 | 功能描述:電可擦除可編程只讀存儲器 8K-Bit Dual Port RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C21LI | 功能描述:電可擦除可編程只讀存儲器 1K Dual Mode Serial RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C21WGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C21WGI-T3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
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