參數(shù)資料
型號: CAT24C0A1YITE13
英文描述: 1K-Bit Serial EEPROM
中文描述: 1K位串行EEPROM
文件頁數(shù): 3/8頁
文件大?。?/td> 616K
代理商: CAT24C0A1YITE13
DsconinuedPat
CAT24C01B
3
Doc. No. 1081, Rev. E
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
A.C. CHARACTERISTICS
V
CC
= +1.8V to +6.0V, C
L
=1TTL Gate and 100pF (unless otherwise specified).
Read & Write Cycle Limits
Symbol
Parameter
1.8V, 2.5V
4.5V-5.5V
Min
Max
Min
Max
Units
SCL
T
I(1)
Noise Suppression Time
Constant at SCL, SDA Inputs
100
100
ns
AA
SCL Low to SDA Data Out
and ACK Out
3.5
1
μ
BUF(1)
Time the Bus Must be Free Before
a New Transmission Can Start
4.7
1.2
μ
HD:STA
Start Condition Hold Time
4
0.6
μ
μ
μ
μ
LOW
Clock Low Period
4.7
1.2
HIGH
Clock High Period
4
0.6
SU:STA
Start Condition Setup Time
(for a Repeated Start Condition)
4.7
0.6
HD:DAT
Data In Hold Time
0
0
ns
SU:DAT
R(1)
F(1)
Data In Setup Time
250
100
ns
SDA and SCL Rise Time
1
0.3
μ
SDA and SCL Fall Time
300
300
ns
SU:STO
Stop Condition Setup Time
4.7
0.6
μ
DH
Data Out Hold Time
100
100
ns
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its input.
Write Cycle Limits
Symbol
Parameter
Min
Typ
Max
Units
WR
Write Cycle Time
10
ms
Power-Up Timing
(1)(2)
Symbol
Parameter
Max
Units
PUR
PUW
Power-up to Read Operation
Power-up to Write Operation
1
1
ms
ms
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CAT24C0A1YTE13 1K-Bit Serial EEPROM
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