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參數(shù)資料
| 型號： | CAT24C03WI-3 |
| 元件分類： | EEPROM |
| 英文描述： | 2-Kb I2C CMOS Serial EEPROM with Partial Array Write Protection |
| 中文描述： | 2 KB的的CMOS串行EEPROM的I2C偏陣列寫保護 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 410K |
| 代理商： | CAT24C03WI-3 |
CAT24C03
4
Doc. No. 1113, Rev. A
2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
PIN DESCRIPTION
SCL:
The Serial Clock input pin accepts the Serial Clock
generated by the Master.
SDA:
The Serial Data I/O pin receives input data and
transmits data stored in EEPROM. In transmit mode, this
pin is open drain. Data is acquired on the positive edge,
and is delivered on the negative edge of SCL.
A
0
, A
1
and A
2
:
The Address pins accept the device ad-
dress. These pins have on-chip pull-down resistors.
WP:
The Write Protect input pin inhibits all write opera-
tions to the upper half of the memory array, when pulled
HIGH. (locations 80H to FFH)This pin has an on-chip
pull-down resistor.
FUNCTIONAL DESCRIPTION
The CAT24C03 supports the Inter-Integrated Circuit (I
2
C)
Bus data transmission protocol, which defines a device
that sends data to the bus as a transmitter and a device
receiving data as a receiver. Data flow is controlled by
a Master device, which generates the serial clock and
all START and STOP conditions. The CAT24C03 acts
as a Slave device. Master and Slave alternate as either
transmitter or receiver. Up to 8 devices may be connected
to the bus as determined by the device address inputs
A
0
, A
1
, and A
2
.
I
2
C BUS PROTOCOL
The I
2
C bus consists of two ‘wires’, SCL and SDA. The
two wires are connected to the V
CC
supply via pull-up
resistors. Master and Slave devices connect to the 2-
wire bus via their respective SCL and SDA pins. The
transmitting device pulls down the SDA line to ‘transmit’
a ‘0’ and releases it to ‘transmit’ a ‘1’.
Data transfer may be initiated only when the bus is not
busy (see A.C. Characteristics).
During data transfer, the SDA line must remain stable
while the SCL line is HIGH. An SDA transition while
SCL is HIGH will be interpreted as a START or STOP
condition (Figure 1).
START
The START condition precedes all commands. It consists
of a HIGH to LOW transition on SDA while SCL is HIGH.
The START acts as a ‘wake-up’ call to all receivers. Absent
a START, a Slave will not respond to commands.
STOP
The STOP condition completes all commands. It consists
of a LOW to HIGH transition on SDA while SCL is HIGH.
The STOP starts the internal Write cycle (when follow-
ing a Write command) or sends the Slave into standby
mode (when following a Read command).
Device Addressing
The Master initiates data transfer by creating a START
condition on the bus. The Master then broadcasts an
8-bit serial Slave address. The first 4 bits of the Slave
address are set to 1010, for normal Read/Write opera-
tions (Figure 2). The next 3 bits, A
2
, A
1
and A
0
, select
one of 8 possible Slave devices. The last bit, R/W,
specifies whether a Read (1) or Write (0) operation is
to be performed.
Acknowledge
After processing the Slave address, the Slave responds
with an acknowledge (ACK) by pulling down the SDA
line during the 9
th
clock cycle (Figure 3). The Slave will
also acknowledge the byte address and every data
byte presented in Write mode. In Read mode the Slave
shifts out a data byte, and then releases the SDA line
during the 9
th
clock cycle. If the Master acknowledges
the data, then the Slave continues transmitting. The
Master terminates the session by not acknowledging
the last data byte (NoACK) and by sending a STOP to
the Slave. Bus timing is illustrated in Figure 4.
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| CAT24C03YI-3 | 2-Kb I2C CMOS Serial EEPROM with Partial Array Write Protection |
| CAT24C03YI-G | 2-Kb I2C CMOS Serial EEPROM with Partial Array Write Protection |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24C03WI-G | 功能描述:電可擦除可編程只讀存儲器 (256x8) 2K 1.8 - 5.5 Industrial Temp RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C03WI-G3 | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection |
| CAT24C03WI-GT | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection |
| CAT24C03WI-GT3 | 功能描述:電可擦除可編程只讀存儲器 2K-Bit I2C Serial 電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24C03WI-T | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection |
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