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參數(shù)資料
| 型號(hào)： | CA5470E |
| 廠商： | INTERSIL CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Quad, 14MHz, Microprocessor BiMOS-E Operational Amplifier with MOSFET Input/Bipolar Output |
| 中文描述： | QUAD OP-AMP, 30000 uV OFFSET-MAX, 15 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 5/5頁 |
| 文件大小： | 57K |
| 代理商： | CA5470E |
3-160
Typical Performance Curve
Metallization Mask Layout
FREQUENCY
10K
14
V
O
P
)
100K
1M
10M
100M
12
10
8
6
4
2
V
S
=
±
7.5V
V+ = 5V, V- = 0V
FIGURE 1. MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
97.2
70
60
50
40
30
20
10
0
69.7
60
50
40
30
20
10
0
97.2
(2.46)
69.7
(1.77)
Dimensions in parentheses are in millimeters and
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10
-3
inch).
The layout represents a chip when it is part of the
wafer. When the wafer is cut into chips, the cleavage
angles are 57
o
instead of 90
o
with respect to the face
of the chip. Therefore, the isolated chip is actually 7
mils (0.17mm) larger in both dimensions.
80
90
CA5470
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