參數(shù)資料
型號(hào)： CA5260E
廠商： HARRIS SEMICONDUCTOR
元件分類： 運(yùn)動(dòng)控制電子
英文描述： 3MHz, BiMOS Microprocessor Operational Amplifiers with MOSFET Input/CMOS Output
中文描述： DUAL OP-AMP, 15000 uV OFFSET-MAX, PDIP8
文件頁(yè)數(shù)： 2/5頁(yè)
文件大小： 45K
代理商： CA5260E
3-147
Absolute Maximum Ratings
Thermal Information
Supply Voltage (Between V+ and V- Terminals). . . . . . . . . . . . . 16V
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1) . . . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
96
157
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Typical Values Intended Only for Design Guidance, V+ = 5V, V- = 0V, T
A
= 25
ο
C,
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
TYPICAL VALUES
UNITS
CA5260
CA5260A
Input Resistance
RI
C
I
f
T
SR
1.5
1.5
T
Input Capacitance
f = 1MHz
4.3
4.3
pF
Unity Gain Crossover Frequency
3
3
MHz
Slew Rate
V
OUT
= 2.5V
P-P
C
L
= 25pF, R
L
= 2k
(Voltage Follower)
5
5
V/
μ
s
Transient Response
Rise Time
t
r
0.09
0.09
μ
s
Overshoot
OS
10
10
%
Settling Time (To <0.1%, V
IN
= 4V
P-P
)
t
S
C
L
= 25pF, R
L
= 2k
(Voltage Follower)
1.8
1.8
μ
s
Electrical Specifications
T
A
= 25
o
C, V+ = 5V, V- = 0V
PARAMETER
SYMBOL
TEST
CONDITIONS
CA5260
CA5260A
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Input Offset Voltage
V
IO
I
IO
I
I
CMRR
V
O
= 2.5V
V
O
= 2.5V
V
O
= 2.5V
V
CM
= 0 to 1V
V
CM
= 0 to 2.5V
-
2
15
-
1.5
4
mV
Input Offset Current
-
1
10
-
1
10
pA
Input Current
-
2
15
-
2
15
pA
Common Mode Rejection Ratio
70
85
-
80
85
-
dB
50
55
-
50
55
-
dB
Common Mode Input Voltage
Range
V
lCR
+
V
lCR
-
PSRR
2.5
3
-
2.5
3
-
V
-
-0.5
0
-
-0.5
0
V
Power Supply Rejection Ratio
V+ = 1V;
V- = 1V
R
L
=
∞
, V
O
= 0.5 to 4V
R
L
= 10k
,
V
O
= 0.5 to 3.6V
V
O
= 0V
V
O
= 5V
R
L
=
∞
70
84
-
75
84
-
dB
Large Signal Voltage Gain
(Note 3)
A
OL
105
111
-
107
113
-
dB
80
86
-
83
86
-
dB
Source Current
I
SOURCE
I
SINK
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
OM
+
V
OM
-
1.75
2.2
-
1.75
2.2
-
mA
Sink Current
1.70
2
-
1.70
2
-
mA
Output Voltage
4.99
5
-
4.99
5
-
V
-
0
0.01
-
0
0.01
V
R
L
= 10k
4.4
4.7
-
4.4
4.7
-
V
-
0
0.01
-
0
0.01
V
R
L
= 2k
3
3.4
-
3
3.4
-
V
-
0
0.01
-
0
0.01
V
CA5260, CA5260A
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