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參數(shù)資料
| 型號： | CA5130A |
| 廠商： | Intersil Corporation |
| 英文描述： | 15MHz, BiMOS Microprocessor Operational Amplifiers with MOSFET Input/CMOS Output |
| 中文描述： | 15MHz的，BiMOS微處理器運算放大器與MOSFET的輸入/ CMOS輸出 |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 638K |
| 代理商： | CA5130A |
19
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
CA5130, CA5130A
Dual-In-Line Plastic Packages (PDIP)
C
e
A
E
C
e
B
e
C
-B-
E1
INDEX
AREA
1 2
3
N/2
N
SEATING
PLANE
BASE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A
1
-A-
0.010 (0.25)
C
A
M
B S
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M
-
1982.
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS
-
3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and
are measured with the leads constrained to be per-
pendicular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads uncon-
strained. e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
e
A
-C-
E8.3
(JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8, 10
C
0.008
0.014
0.204
0.355
-
D
0.355
0.400
9.01
10.16
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
e
A
e
B
L
0.300 BSC
7.62 BSC
6
-
0.430
-
10.92
7
0.115
0.150
2.93
3.81
4
N
8
8
9
Rev. 0 12/93
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CA5130AE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CA5130AM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CA5130AM96 | 制造商:Rochester Electronics LLC 功能描述:SOIC IN TAPE & REEL - Bulk |
| CA5130AS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CA5130AT | 制造商:Harris Corporation 功能描述: |
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