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參數(shù)資料
| 型號： | CA3338M |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | DAC |
| 英文描述： | CMOS Video Speed, 8-Bit, 50 MSPS, R2R D/A Converters |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.02 us SETTLING TIME, 8-BIT DAC, PDSO16 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 59K |
| 代理商： | CA3338M |
10-17
Applications
The output of the CA3338 can be resistively divided to match a
doubly terminated 50
or 75
line, although peak-to-peak
swings of less than 1V may result. The output magnitude will
also vary with the converter’s output impedance. Figure 5
shows such an application. Note that because of the HCT input
structure, the CA3338 could be operated up to +7.5V V
DD
and
V
REF
+ supplies and still accept 0V to 5V CMOS input voltages.
If larger voltage swings or better accuracy is desired, a high
speed output buffer, such as the HA-5033, HA-2542, or
CA3450, can be employed. Figure 6 shows a typical applica-
tion, with the output capable of driving
±
2V into multiple 50
terminated lines.
Operating and Handling Considerations
HANDLING
All inputs and outputs of CMOS devices have a network
for electrostatic protection during handling. Recom-
mended handling practices for CMOS devices are
described in AN6525. “Guide to Better Handling and
Operation of CMOS Integrated Circuits.”
OPERATING
Operating Voltage
During operation near the maximum supply voltage limit,
care should be taken to avoid or suppress power supply
turn-on and turn-off transients, power supply ripple, or
ground noise; any of these conditions must not cause the
absolute maximum ratings to be exceeded.
Input Signals
To prevent damage to the input protection circuit, input
signals should never be greater than V
DD
nor less than
V
SS
. Input currents must not exceed 20mA even when
the power supply is off.
Unused Inputs
A connection must be provided at every input terminal. All
unused input terminals must be connected to either V
CC
or GND, whichever is appropriate.
NOTES:
1. Both V
REF
+pin and 392
resistor should be
bypassed within
1
/
4
inch.
2. Keep nodal capacitance at CA3450 pin 3 as
low as possible.
3. V
OUT
Range =
±
3V at CA3450.
CLOCK
8 DATA
BITS
+5V
15
16
14
8
1-7, 9
LE
D0 - D7
V
DD
COMP
V
SS
CA3338
V
OUT
V
REF
+
V
EE
12
13
11
10
R
V
REF
-
R
11
UP TO 5 OUTPUT LINES
FOR R = 75
, 3 LINES
FOR R = 50
V
OUT
1
V
OUT
N
+3.00V AT 25mA
4.7
μ
F
TAN
4
μ
F
4.7
μ
F TAN
+
4.7
μ
F
TAN
0
μ
F
0.1
μ
F
CER.
0.1
μ
F
CER.
0.1
μ
F CER.
14
+6V
-6V
392
1%
392
1%
10k
1k
3
4, 5, 12, 13
R
R
+
+
+
V
OUT
=
±
1.5V
PEAK
6
7, 8
9
+
-
CA3450
ADJUST
OFFSET
5pF
FIGURE 6. CA3338 AND CA3450 FOR DRIVING MULTIPLE COAXIAL LINES
TABLE 1. OUTPUT VOLTAGE vs INPUT CODE AND V
REF
V
REF
+
V
REF
-
STEP SIZE
5.12V
0
0.0200V
5.00V
0
0.0195V
4.608V
0
0.0180V
2.56V
-2.56V
0.0200V
2.50V
-2.50V
0.0195V
Input Code
111111112 = FF
HEX
111111102 = FE-
HEX
5.1000V
5.0800
4.9805V
4.9610
4.5900V
4.5720
2.5400V
2.5200
2.4805V
2.4610
10000001
2
= 81
HEX
10000000
2
= 80
HEX
01111111
2
= 7F
HEX
2.5800
2.5600
2.5400
2.5195
2.5000
2.4805
2.3220
2.3040
2.2860
0.0200
0.0000
- 0.0200
0.0195
0.0000
-0.0195
00000001
2
= 01
HEX
00000000
2
= 00
HEX
0.0200
0.0000
0.0195
0.0000
0.0180
0.0000
-2.5400
-2.5600
-2.4805
-2.5000
CA3338, CA3338A
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